FOOD AND BEVERAGE APPLICATIONS

FIELD OF INVENTION

The present invention relates broadly to the detection and removal of defective seals/wom out packaging during beverage powder sachet sealing process.

BACKGROUND

Any mention and/or discussion of prior art throughout the specification should not be considered, in any way, as an admission that this prior art is well known or forms part of common general knowledge in the field.

To ensure that the finished products in the food and beverage industry meet consumer quality demands is largely dependent on the packaging process that confine the contents to maintain shelf life and quality inside the package. Hence, quality assurance (QA) is dependent on efficient identification of defective seals. Specifically, food and beverages, confined in cup packages like noodles, soup, etc, are mass-produced and packaged in an assembly line with high throughput. A slightly misplaced seal/poor sealing due to trapped particles could result in a leak, which may degrade the food quality via entry of microbes/moisture. This could be detrimental to the consumer’s health and render a negative brand image for the manufacturer in addition to huge financial loss. During such high-speed processes, identifying defective sealing without compromising on the throughput is a challenge. This has pushed food and beverage manufacturers towards finding cost effective inspection solutions to ensure package integrity is not compromised.

Popular approaches in industries for cup seal integrity detection include fill weight test, microbial checks, squeeze and roll check, vacuum test, peel test and visual inspection, which require offline analysis, random sampling, expensive equipment, low throughput and high processing time, thereby considerably affecting the production/packaging cost and time.

Generally, current methods suffer from the following drawbacks.

i. Such methods require offline screening and high processing time.

ii. They are destructive in nature using expensive and heavy machinery with low throughput.

iii. Complex analysis requiring labor, sampling methods and time consuming with generation of waste from rejects.

Embodiments of the present invention seek to address at least one of the above problems. SUMMARY

In accordance with a first aspect of the present invention, there is provided a method for integrity testing of cup packages, the method comprising the steps of:

disposing at least a portion of a seal area of the cup package relative to an electrode structure;

applying an AC bias voltage to the electrode structure;

measuring an electrical property of the portion of the seal area over a frequency range, and

determining the integrity based on the measured electrical property over the frequency range.

In accordance with a second aspect of the present invention, there is provided a system for integrity testing of cup packages, the system comprising:

an electrode structure configured to be dispose relative to at least a portion of a seal area of the cup package;

a source configured to apply an AC bias voltage to the electrode structure;

a measurement unit configured to measure an electrical property of the portion of the seal area over a frequency range, and

a determination unit configured to determine the integrity based on the measured electrical property over the frequency range.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments of the invention will be better understood and readily apparent to one of ordinary skill in the art from the following written description, by way of example only, and in conjunction with the drawings, in which:

Figure 1A shows a schematic diagram illustrating the existing cup package-sealing problem.

Figure 1B shows a detection setup according to an example embodiment, comprises two copper circular ring electrodes El, E2 sandwiching the seal area.

Figure 2A shows a photograph of a copper electrode for use in example embodiments, specifically, a circular ring electrode.

Figure 2B shows a photograph of another copper electrode for use in an example embodiments, specifically, a circular ring array electrode. Figure 3A shows a schematic diagram showing a planar testing mode for seal defect identification showing good and defective seal area, respectively, according to an example embodiment.

Figure 3B shows graphs illustrating impedance vs frequency scans for a well-sealed and poorly sealed area of a cup package in planar testing mode, according to an example embodiment.

Figure 3C shows graphs illustrating phase vs frequency scan for a well-sealed and poorly sealed area of a cup package in planar testing mode, according to an example embodiment.

Figure 3D shows graphs illustrating capacitance vs frequency scan for a well-sealed and poorly sealed area of a cup package in planar testing mode, according to an example embodiment.

Figure 4A shows a schematic diagram showing a symmetric testing mode for seal defect identification showing no-defect and defective seal area, respectively, according to an example embodiment.

Figure 4B shows graphs illustrating impedance vs frequency scans for a well-sealed and poorly sealed area of a cup package in symmetric testing mode, according to an example embodiment.

Figure 4C shows graphs illustrating phase vs frequency scan for a well-sealed and poorly sealed area of a cup package in symmetric testing mode, according to an example embodiment.

Figure 4D shows graphs illustrating capacitance vs frequency scan for a well-sealed and poorly sealed area of a cup package in symmetric testing mode, according to an example embodiment.

Figure 5A shows a schematic diagram showing an asymmetric testing mode for seal defect identification showing good and defective seal area, respectively, according to an example embodiment.

Figure 5B shows graphs illustrating impedance vs frequency scans for a well-sealed and poorly sealed area of a cup package in asymmetric testing mode, according to an example embodiment.

Figure 5C shows graphs illustrating phase vs frequency scan for a well-sealed and poorly sealed area of a cup package in asymmetric testing mode, according to an example embodiment.

Figure 5D shows graphs illustrating capacitance vs frequency scan for a well-sealed and poorly sealed area of a cup package in asymmetric testing mode, according to an example embodiment.

Figure 6A shows a schematic diagram showing roller electrodes in planar testing mode for cup seal integrity detection according to an example embodiment.

Figure 6B shows a schematic diagram showing roller electrodes in asymmetric testing mode for cup seal integrity detection according to an example embodiment.

Figure 7 shows a flowchart illustrating a method for integrity testing of cup packages, according to an example embodiment. Figure 8 shows a schematic drawing illustrating a system for integrity testing of cup packages according to an example embodiment.

DETAILED DESCRIPTION

Embodiments of the present invention use a ring electrode/ring array electrode in different modes of testing for identifying the presence of defective seals and preferably defect location in cup packages. The detection setup according to an example embodiment comprises of two circular ring electrodes, or two ring array electrodes, or a combination of both connected to a frequency response analyzer, which generates an AC electric field of varying frequencies as the input to the system. The output response is analyzed in the form of an electrical quantity, for example, capacitance. The presence of a misaligned seal leads to an air gap, which alters the capacitance between the electrodes [Bandholtz et al. (2007); U.S. Patent No. 7,696,890]. The location of the defect can be identified from the differential readings between the well- sealed and poorly sealed area and can be determined based on the location of the electrode pair using one ring electrode array, optionally in combination with a ring electrode or, two ring electrode arrays according to preferred example embodiments. Digression from the expected cup seal capacitance will alert the packaging line and divert the defective samples for replacement or re- sealing.

Figure 1A shows a schematic diagram illustrating the existing cup package- sealing problem. Cup packages lOOa, lOOb can suffer from misaligned sealing, which result in an air gap (defect 102) in the no- seal area, see cup lOOb compared to properly sealed cup lOOa. The inventors have recognized that an electrical quantity can be explored that varies in the presence and absence of the sealing layer. For example, capacitance between a first (sensing) electrode El of an electrode structure 104 and a second (reference) electrode E2 of the electrode structure 104 is altered when an external entity enters/leaves the electric field, or a material between the electric field is altered, resulting in a seal defect 106, compare cup packages l08a, l08b in Figure 1B. Also, absence of a sealing layer, as another form of seal defect 106, alters the fringing fields between electrodes El and E2, which alters the capacitance. In addition, a careful design of electrodes El and E2 such as a ring electrode/ring electrode array according to preferred embodiments can precisely locate the defective site based on differential capacitance between the well-sealed area and the defective region.

That is, in example embodiments of the present invention the frequency response analysis using an electrode structure 104 according to example embodiments helps in identifying the presence or absence of the defect 106 in the seal. In one embodiment, the detection setup comprises two copper circular ring electrodes El, E2 sandwiching the seal area as shown in Figure 1B. In other embodiments, which will be described below in more detail, to assess the extent of the defect and to pin down the location of the defect, an array of electrodes, e.g. two or more short curved electrodes in contact with the top seal area, which may form a ring electrode array, are measured sequentially to identify the defective site, or a combination of a ring electrode and an array of electrodes sandwiching the seal area from top and bottom, or two arrays of electrodes serve as sensing and reference electrode sandwiching the seal area from top and bottom, in each case are connected to a frequency response analyzer system, which generates an AC electric field of varying frequencies as the input to the system.

The output is monitored, for example, in the form of capacitance, which is sensitive to absence of the material forming the seal and other forms of seal defects, as described above. For example, absence of seal leads to an air gap, which results in decreased capacitance. More generally, any deviation from the ideal seal capacitance can be used to alert a packaging line and divert the defective samples for replacement or re-sealing. Monitoring the frequency response, for example, the capacitance change, can enable classification of good and defective samples in real-time with high throughput to match the sealing/packaging process throughput, according to example embodiments. Based on the extent of damage, capacitance (for example) fingerprints can be created to quantify the type of defect according to example embodiments.

Experimental set up according to example embodiments

Figure 2 shows photographs of the configuration of copper electrodes 200, 202 for use in example embodiments, specifically, a) a circular ring electrode 200 and b) a circular ring array electrode 202, i.e. two or more short curved electrodes e.g. 204 aligned on a ring-shaped substrate 206. Copper was used for the construction of the metal electrodes 200, 202 in the example embodiments described herein, by way of example, not limitation. The two electrode configurations, namely, the circular ring shaped electrode 200 and the ring array 202 with intermittently spaced curved electrodes e.g. 204 compliant with the top/bottom side of seal rim diameter of an cup to be tested, such as an instant noodle cup, were used as the testing electrodes with a plexiglass substrate 206 for support according to example embodiments, forming the electrode structure in use in such embodiments. Both the cup and the seal used for testing were made from insulating materials.

In real case scenarios, the misaligned seal area on a cup could be much smaller as opposed to the total electrode covering area on the cup, thereby masking any visible differential reading in the measured electrical quantity. Hence, described below are preferred, but not limiting, embodiments in terms of structure and mode of testing.

i. Planar testing mode using a single circular ring electrode array according to an example embodiment

Figure 3 shows: A) A schematic diagram showing a planar testing mode for seal defect identification illustrating good and defective seal areas e.g. 300, 302, respectively, B) impedance vs frequency scans, C) phase vs frequency scans, and D) capacitance vs frequency scans for a well-sealed (e.g. area 300) and poorly sealed area (e.g. area 302) of a cup package 304 in planar testing mode.

A single circular ring electrode array 306 made of copper with equal spaced curved electrodes labeled 1 to 7 (compare also Figure 2B) was placed on top of the seal 310, as shown in Figure 3A. Any pair of adjacent electrodes (as sensing and reference electrode, respectively) were measured at a time to obtain the frequency response to differentiate between well-sealed area 300 (here between electrodes 3 and 4) and defective seal area 302 (here between electrodes 2 and 3). As can be seen in the frequency response scans (AC bias applied, and frequency response detected, by frequency response analyzer 312) in Figures 3B-D, the well-sealed and poorly sealed area can be differentiated by each of the capacitance, phase and impedance. In this mode of testing, the top electrode array 306 can be rotated to generate an electrical profile of the seal 310.

The observed trend according to example embodiments shows a more apparent change in the capacitance compared to the phase or impedance. This is attributable to the fact that the impedance and phase change is a cumulative effect of resistance, capacitance and inductive elements, which makes overall change smaller compared to the capacitance readout that directly measures the change in dielectric property of the package due to the presence or absence of material between the electrodes (without including other circuit elements). In addition, lower frequencies (< 100 Hz) are dominated by power line interference (50 Hz noise) while at higher frequencies (> 1 KHz) the separation is lesser. This is attributable to the insulating nature of the packaging material making it hard to polarize the sealing area by small signal electrical excitation.

In one embodiment, the two adjacent electrodes (e.g. 1, 2 and 3, 4) are of the same length to preferably ensure that the differential capacitance is not due to differential electrode lengths and the detected change is instead from defects.

ii. Symmetric testing mode using two circular ring electrode arrays according to an example embodiment

In a production line scenario, the cup is typically top-sealed in a metallic ring for confinement and sealed along the cup rim (periphery) at high throughput. The metallic ring allows easy integration of the testing system according to example embodiments directly onto the sealing site, i.e. the existing metallic ring can be applied as a ring electrode according to example embodiments, thereby advantageously maintaining the production throughput.

Figure 4 shows: A) A schematic diagram showing a symmetric testing mode for seal defect identification illustrating no-defect and defective seal area e.g. 400, 402, respectively, B) impedance vs frequency scans, C) phase vs frequency scans, and D) capacitance vs frequency scans for a well-sealed (e.g. area 400) and poorly sealed area (e.g. area 402) of a cup package 405 in symmetric testing mode.

Two copper ring electrode arrays 404, 406 were aligned top-bottom and with the seal 408 sandwiched therebetween to detect and locate compromised seal area 402, as shown in Figure 4A.

From the frequency response scans (AC bias applied, and frequency response detected, by frequency response analyzer 412) in Figures 4B-D, the well-sealed area 400 (here between electrodes 1 and 3), and poorly sealed area 402 (here between electrodes 2 and 4) can be differentiated by each of the capacitance, phase and impedance, and the location of the poorly sealed-area 402 can be determined. In this mode of testing, both the bottom and top electrode arrays 404, 406 can be rotated synchronously to generate an electrical profile of the seal 408.

The observed trend according to example embodiments shows a more apparent change in the capacitance compared to the phase or impedance. This is attributable to the fact that the impedance and phase change is a cumulative effect of resistance, capacitance and inductive elements, which makes overall change smaller compared to the capacitance readout that directly measures the change in dielectric property of the package due to the presence or absence of material between the electrodes (without including other circuit elements). In addition, lower frequencies (< 100 Hz) are dominated by power line interference (50 Hz noise) while at higher frequencies (> 1 KHz) the separation is lesser. This is attributable to the insulating nature of the packaging material making it hard to polarize the sealing area by small signal electrical excitation.

In one embodiment, the two electrodes (e.g. 1, 3 and 2, 4) are of the same length sandwiching the seal area therebetween to preferably ensure that the differential capacitance between good and defective area arises from presence of defects and not due to different electrode lengths iii. Asymmetric testing mode using one ring electrode and one ring electrode array according to an example embodiment

Figure 5 shows: A) A schematic diagram showing an asymmetric testing mode for seal defective identification showing good and defective seal area e.g. 500, 502, respectively, B) impedance vs frequency scans, C) phase vs frequency scans, and D) capacitance vs frequency scans for a well-sealed (e.g. area 500) and poorly sealed area (e.g. area 502) of a cup package 504 in asymmetric testing mode.

One copper ring electrode array 506 was placed on top of the seal 508 and a copper ring electrode 3 was placed at the bottom sandwiching the seal 508 and forming the test configuration, as shown in Figure 5A. From the frequency response scans (AC bias applied, and frequency response detected, by frequency response analyzer 512) in Figures 5B-D, the poorly sealed area 502 (here between electrodes 2 and 3, forming two electrodes of different length sandwiching the seal area are connected top and bottom) can be distinguished and located based on the difference in each of capacitance, phase and impedance from the well- sealed area.

As can be seen in the frequency response scans in Figure 5B-D, the scans are readily distinguishable between the respective samples, advantageously enabling identification of defect location between a pair of electrodes. In this mode of testing, the bottom electrode 3 can be held stationary and the top electrode array 506 can be rotated to generate an electrical profile of the seal.

The observed trend according to example embodiments shows a more apparent change in the capacitance compared to the phase or impedance. This is attributable to the fact that the impedance and phase change is a cumulative effect of resistance, capacitance and inductive elements, which makes overall change smaller compared to the capacitance readout that directly measures the change in dielectric property of the package due to the presence or absence of material between the electrodes (without including other circuit elements). In addition, lower frequencies (< 100 Hz) are dominated by power line interference (50 Hz noise) while at higher frequencies (> 1 KHz) the separation is lesser. This is attributable to the insulating nature of the packaging material making it hard to polarize the sealing area by small signal electrical excitation.

Figures 6A and 6B are respective schematic diagrams showing roller electrodes for cup seal integrity detection according to other example embodiments.

To obtain a detailed electrical spectrum of a cup seal according to other embodiments for profiling defects even faster to minimize or without compromising on the throughput, the electrodes can be modified to use one or more roller electrodes e.g. El, E2, preferably with width equal to the seal area width to remove influence of differential electrode width on the response, as shown in Figures 6A and 6B. Such an electrode structure according to example embodiments can be used in planar mode as shown in Figure 6A. Specifically, two or more roller electrodes E1-E4 are moving over the seal 600. In the configuration illustrated in Figure 6A, electrodes El and E2 differentiate good seal area e.g. 1 from a defective seal area e.g. 2 measured by electrodes E2 and E3. The frequency response is detected by frequency response analyzer 602.

In another embodiment, one or more roller electrodes are used together with a ring electrode E3 in asymmetric testing mode as shown in Figure 6B. Specifically, in the configuration illustrated in Figure 6B, electrodes El and E3 differentiate good seal area e.g. 1 from defective seal area e.g. 2 measured by E2 and E3. The frequency response is detected by frequency response analyzer 604.

In the embodiments described above with reference to Figures 6 A and 6B, the number of roller electrodes can be varied, e.g. chosen according to the cup size and material.

In the embodiment shown in Figures 6B, as the roller electrodes e.g. El, E2 traverse through along the seal 606 circumference, they cross over well-sealed sites e.g. 1 and defective sites e.g. 2; The frequency response analyzer integrates the electrical quantity measured at each point contact across the whole seal area to give electrical signatures for the entire seal 606 area. In addition, the instant measured electrical quantity measured at various locations along the seal 606 area can identify the location of defects.

Preferably, such an electrode structure according to an example embodiment can identify the type of defects (e.g. seal trapped particle or misaligned seal). The demonstrated type of defect here is a misaligned seal with air gap (absence of material). Similarly, e.g. trapped particles (presence of additional material) depending on their nature (solid/fluid and conducting/insulating) also alter the electrical quantity measured between the electrodes. Such an electrode structure according to an example embodiment can also identify defect location and quantify defects (e.g. amount of trapped particles) by comparing against control standards (well- sealed cup). In the embodiments described above with reference to Figures 6A and 6B the roller electrodes E1-E4 generate data at each point of contact, which cumulatively can lead to a large data set. This integrated data or electrical signatures can advantageously serve as input fingerprints for machine learning by artificial intelligence (AI) systems for teaching a model to quantitatively and qualitatively identify and classify defects based on analyzing the electrical property of the portion of the seal area over the frequency range.

The use of the different modes of testing as described above preferably enables to encompass a wider variety of materials (conductive and non-conductive) of different thickness and shapes, since not all cup packages may be compliant with a single mode of testing. For example, some packages may have the top seal layer conductive with an insulating rim as opposed to both seal layer and cup material being insulating, which may make planar testing mode more conducive for testing. This is because the top conductive component has a higher capacitance reading compared to the defect, for example, insulating air gap, thereby giving a larger differential capacitance compared to packages with the same defect but having insulating top seal and bottom rim. The roller electrode structure in conjunction with a wide range frequency analysis according to example embodiments preferably allows profiling any food/beverage particles trapped, if any, in the seal areas. In addition, high frequency of operation, for example, in the radio frequency (RF, 30 kHz-300 GHz) range allows contactless mode of operation for seal integrity testing using RF compliant probes according to other example embodiments.

More specifically, the RF ranges from few kHz to GHz, as will be appreciated by a person skilled in the art. For frequencies up to few MHz, the electrodes used in the example embodiment described above are compatible with the inductor capacitor resistor (LCR) meter used in example embodiments allowing contact mode of operation. To achieve non-contact mode of operation in different example embodiments, impedance analysis at frequencies greater than 1 MHz is preferred, which is possible using high frequency operating systems such as impedance analyzer and network analyzer.

For locating the precise location of minor leaks in seals, which may require a large number of electrodes/electrode array or multiple point scanning, a combination of ring electrodes with roller electrodes can be used according to an example embodiment, which can characterize point defects in seals.

Different types/extent of leak will have different signatures, e.g. different capacitance signatures, which leads to a multi-dimensional dataset making data analysis more challenging. The use of a machine learning approach to cluster and fingerprint signatures, for example capacitance signatures, to classify defect type, identify location and quantify defect can address this according to example embodiments.

Figure 7 shows a flowchart 700 illustrating a method for integrity testing of cup packages, according to an example embodiment. At step 702, at least a portion of a seal area of the cup package is disposed relative to an electrode structure. At step 704, an AC bias voltage is applied to the electrode structure. At step 706, an electrical property of the portion of the seal area is measured over a frequency range. At step 708, the integrity is determined based on the measured electrical property over the frequency range.

The electrical property may comprise one or more of a group consisting of capacitance, resistance, phase and impedance.

The electrode structure may comprise one or more of a group consisting of a ring electrode, a ring electrode array, and a roller electrode.

The method may comprise operating the electrode structure at radio frequency range, e.g. about 3 kHz-300 GHz.

The method may comprise using the electrode structure in non-contact mode, e.g. when operated at radio frequency range.

The electrode structure may comprise two ring electrodes, and the method may comprise disposing the ring electrodes with the seal area sandwiched there between. The method may comprise applying the AC bias voltage between the two ring electrodes.

The electrode structure may comprise a ring electrode array, and the method may comprise disposing the ring electrode array on the seal area. The method may comprise applying the AC bias voltage between adjacent electrode segments of the ring electrode array.

The electrode structure may comprise first and second ring electrode arrays, and the method may comprise disposing the first and second ring electrode arrays with the seal area sandwiched there between. The method may comprise applying the AC bias voltage between adjacent pairs of one electrode segment of each of the first and second ring electrode arrays.

The electrode structure may comprise a ring electrode array and a ring electrode, and the method may comprise disposing the ring electrode array and the ring electrode with the seal area sandwiched between the ring electrode array and the ring electrode. The method may comprise applying the AC bias voltage between respective electrode segments of the ring electrode arrays and the ring electrode.

The electrode structure may comprise two or more roller electrodes, and the method may comprise disposing the roller electrodes on the seal area. The method may comprise applying the AC bias voltage between adjacent ones of the roller electrodes.

The electrode structure may comprise one or more roller electrodes and a ring electrode, and the method may comprise disposing the one or more roller electrodes on the seal area and disposing the ring electrode below the seal area. The method may comprise applying the AC bias voltage between respective ones of the roller electrodes and the ring electrode.

The determining may comprise using an artificial intelligence (AI) system to analyze the electrical property of the portion of the seal area over the frequency range. The method may comprise using the AI system to teach a model based on reference values for the electrical property of the portion of the seal area over the frequency range. Figure 8 shows a schematic drawing illustrating a system 800 for integrity testing of cup packages according to an example embodiment. The system 800 comprises an electrode structure 802 configured to be dispose relative to at least a portion of a seal area 804 of a cup package 806; a source 808 configured to apply an AC bias voltage to the electrode structure 802; a measurement unit 810 configured to measure an electrical property of the portion of the seal area over a frequency range, and a determination unit 812 configured to determine the integrity based on the measured electrical property over the frequency range.

The electrical property may comprise one or more of a group consisting of capacitance, resistance, phase and impedance.

The electrode structure 802 may comprise one or more of a group consisting of a ring electrode, a ring electrode array, and a roller electrode.

The electrode structure 802 may be operated at radio frequency range, e.g. about 3 kHz-300 GHz.

The electrode structure 802 may be used in non-contact mode, e.g. when operated at radio frequency range.

The electrode structure 802 may comprise two ring electrodes configured to be disposed with the seal area 804 sandwiched there between. The source 808 may be configured to apply the AC bias voltage between the two ring electrodes.

The electrode structure 802 may comprise a ring electrode array configured to be disposed on the seal area 804. The source 808 may be configured to apply the AC bias voltage between adjacent electrode segments of the ring electrode array.

The electrode structure 802 may comprise first and second ring electrode arrays configured to be disposed with the seal area 804 sandwiched there between. The source 808 may be configured to apply the AC bias voltage between adjacent pairs of one electrode segment of each of the first and second ring electrode arrays.

The electrode structure 802 may comprise a ring electrode array and a ring electrode configured to be disposed with the seal area 804 sandwiched between respective electrode segments of the ring electrode array and the ring electrode. The source 808 may be configured to apply the AC bias voltage between respective electrode segments of the ring electrode arrays and the ring electrode.

The electrode structure 802 may comprise two or more roller electrodes configured to be disposed on the seal area 804. The source 808 may be configured to apply the AC bias voltage between adjacent ones of the roller electrodes.

The electrode structure 802 may comprise one or more roller electrodes configured to be disposed on the seal area 804 and a ring electrode configured to be disposed below the seal area 804. The source 808 may be configured to apply the AC bias voltage between respective ones of the roller electrodes and the ring electrode. The determination unit 812 may comprise an artificial intelligence (AI) system configured to analyze the electrical property of the portion of the seal area 804 ver the frequency range. The AI system may be configured to teach a model based on reference values for the electrical property of the portion of the seal area over the frequency range.

Embodiments of the present invention can provide one or more of the following advantages: i. Electrical property screening, e.g. capacitance based screening according to example embodiments is highly sensitive to leaks and can screen defects instantly. The real-time screening of compromised seals allows processing/packaging issues to be reduced or preferably resolved in production/packaging line. Electrical property screening, e.g. capacitance based sensing can provide real time integrity inspection of every cup on the packaging line - at the speed of the machine throughput

ii. Non-destructive, low cost and simple portable circuitry.

iii. Simple mode of inspection with no need for sampling methods- minimizes waste (time, work-backs, materials and labor) and reduces waste disposal.

Industrial applications

Food and beverage manufacturers fill cups at high speed and seal at high temperature. During this process, they suffer e.g. misaligned sealing, which subsequently affects sample quality and can lead to waste causing financial losses. This can be extended to any type of content in cups as only the seal area is inspected, which prevents destructive testing of the whole sample.

Electrical property screening, e.g. capacitance based screening according to example embodiments can identify and preferably locate defective seals at a rapid rate in-line, thereby increasing the throughput during packaging and reducing wastage.

During the sealing process, spillage of food/beverage particles onto the seal area could also lead to defective seals subsequently affecting product quality and leading to financial losses.

Embodiments of the present invention can be extended for non-contact mode of inspection of defective seals, contents and inner coatings by designing electrodes/electrode arrays compatible with radio frequency (3 kHz to 300 GHz) operation, which can create a stronger fringing electric field and can thus eliminate the need for contact mode inspection.

More specifically, the RF ranges from few kHz to GHz, as will be appreciated by a person skilled in the art. For frequencies up to few MHz, the electrodes used in the example embodiment described above are compatible with the inductor capacitor resistor (LCR) meter used in example embodiments allowing contact mode of operation. To achieve non-contact mode of operation in different example embodiments, impedance analysis at frequencies greater than 1 MHz is preferred, which is possible using high frequency operating systems such as impedance analyzer and network analyzer. Such high frequencies (> 1 MHz) can produce stronger fringing fields spanning larger distances that can penetrate the material under test without the need for electrodes to be in contact with the package. Using an RF compatible electrode array according to example embodiments to obtain impedance signatures across the cup seal region generates a stronger electrical field that can advantageously provide an in-depth cup seal impedance profile to study and classify defects both in contact and non-contact mode.

Aspects of the systems and methods described herein, for example the source 808, and/or the measurement unit 810, and/or the determination unit 812, may be implemented as functionality programmed into any of a variety of circuitry, including programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), programmable array logic (PAL) devices, electrically programmable logic and memory devices and standard cell-based devices, as well as application specific integrated circuits (ASICs). Some other possibilities for implementing aspects of the system include: microcontrollers with memory (such as electronically erasable programmable read only memory (EEPROM)), embedded microprocessors, firmware, software, etc. Furthermore, aspects of the system may be embodied in microprocessors having software -based circuit emulation, discrete logic (sequential and combinatorial), custom devices, fuzzy (neural) logic, quantum devices, and hybrids of any of the above device types. Of course the underlying device technologies may be provided in a variety of component types, e.g., metal-oxide semiconductor field-effect transistor (MOSFET) technologies like complementary metal-oxide semiconductor (CMOS), bipolar technologies like emitter- coupled logic (ECL), polymer technologies (e.g., silicon-conjugated polymer and metal- conjugated polymer-metal structures), mixed analog and digital, etc.

The above description of illustrated embodiments of the systems and methods is not intended to be exhaustive or to limit the systems and methods to the precise forms disclosed. While specific embodiments of, and examples for, the systems components and methods are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the systems, components and methods, as those skilled in the relevant art will recognize. The teachings of the systems and methods provided herein can be applied to other processing systems and methods, not only for the systems and methods described above.

The elements and acts of the various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the systems and methods in light of the above detailed description.

In general, in the following claims, the terms used should not be construed to limit the systems and methods to the specific embodiments disclosed in the specification and the claims, but should be construed to include all processing systems that operate under the claims. Accordingly, the systems and methods are not limited by the disclosure, but instead the scope of the systems and methods is to be determined entirely by the claims.

Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise," "comprising," and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is to say, in a sense of "including, but not limited to." Words using the singular or plural number also include the plural or singular number respectively. Additionally, the words "herein," "hereunder," "above," "below," and words of similar import refer to this application as a whole and not to any particular portions of this application. When the word "or" is used in reference to a list of two or more items, that word covers all of the following interpretations of the word: any of the items in the list, all of the items in the list and any combination of the items in the list.