METHOD FOR WRITING TO RESISTANCE CHANGE NONVOLATILE MEMORY ELEMENT

WIPO Patent Application WO/2013/021649

A1

A method for writing to a resistance change nonvolatile memory element comprises a step of placing a variable resistance layer in a low resistance state by applying a first negative voltage (-V1) to a second electrode with reference to a first electrode and a step of placing the resistance change layer in a high resistance state. The step of placing the resistance change layer in a high resistance state comprises a step of applying a second positive voltage (V2) to the second electrode with reference to the first electrode and a step of placing the resistance change layer in the high resistance state by applying to the second electrode a negative third voltage (-V3) that is smaller than the absolute value of a negative threshold voltage for changing the resistance change layer from the high resistance state to the low resistance state with reference to the first electrode after a step of applying the second positive voltage (V2) to the second electrode with reference to the first electrode.

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KATAYAMA KOJI
MITANI SATORU
TAKAGI TAKESHI

PCT/JP2012/005068

February 14, 2013

August 09, 2012

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PANASONIC CORP (JP)
KATAYAMA KOJI
MITANI SATORU
TAKAGI TAKESHI

G11C13/00

WO2010021134A1

2010-02-25

JP2011146111A	2011-07-28
JP2007004935A	2007-01-11

NII, Hiromori (JP)
New house Extensive 守 (JP)

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