Title:
METHODS AND APPARATUSES FOR GENERATING RANDOM NUMBERS BASED ON BIT CELL SETTLING TIME
Document Type and Number:
WIPO Patent Application WO/2016/140723
Kind Code:
A3
Abstract:
One feature pertains to a true random number generator that utilizes the settling time of a bit cell as an entropy source to generate random digital output values. The bit cell may be a static random access memory bit cell. The bit cell's settling time may be converted into a digital output using an analog to digital converter. A plurality of bit cells may serially couple to one another in a ring formation. The bit cell ring can then be enabled such that each bit cell of the plurality of bit cells achieves a settling value that activates the subsequent bit cell in the ring causing it to in turn reach a settling value, and so on. An output node of one of the bit cells in the ring can then be sampled using a flip-flop to generate a continuous stream of random bits.
Inventors:
CHEN NAN (US)
ZHANG JUNMOU (US)
CHEN MIN (US)
ZHANG JUNMOU (US)
CHEN MIN (US)
Application Number:
PCT/US2015/065627
Publication Date:
October 27, 2016
Filing Date:
December 14, 2015
Export Citation:
Assignee:
QUALCOMM INC (US)
International Classes:
G06F7/58
Foreign References:
| US20110128081A1 | 2011-06-02 | |||
| US8880954B2 | 2014-11-04 |
Other References:
CARLOS TOKUNAGA ET AL: "True Random Number Generator with a Metastability-Based Quality Control", 2007 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (IEEE CAT. NO.07CH37858), IEEE, PISCATAWAY, NJ, USA, 1 February 2007 (2007-02-01), pages 404 - 611, XP031180143, ISBN: 978-1-4244-0852-8
MICHAL VARCHOLA: "FPGA Based True Random Number Generators for Embedded Cryptographic Applications", 1 December 2008 (2008-12-01), XP055298209, Retrieved from the Internet [retrieved on 20160829]
MICHAEL EPSTEIN ET AL: "Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts", LECTURE NOTES IN COMPUTER SCIENCE LNCS - CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2003, 1 January 2003 (2003-01-01), pages 152 - 165, XP055042593, Retrieved from the Internet [retrieved on 20121030]
MICHAL VARCHOLA: "FPGA Based True Random Number Generators for Embedded Cryptographic Applications", 1 December 2008 (2008-12-01), XP055298209, Retrieved from the Internet
MICHAEL EPSTEIN ET AL: "Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts", LECTURE NOTES IN COMPUTER SCIENCE LNCS - CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2003, 1 January 2003 (2003-01-01), pages 152 - 165, XP055042593, Retrieved from the Internet
Attorney, Agent or Firm:
LOZA, Julio (LLP305 North Second Avenue #12, Upland California, US)
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