MONITORING CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND VEHICLE

Title:

MONITORING CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND VEHICLE

Document Type and Number:

WIPO Patent Application WO/2023/166808

Kind Code:

A1

Abstract:

This monitoring circuit comprises first and second oscillators, first and second frequency dividers, first and second counters, a determination unit, and a specification unit. The first and second frequency dividers perform frequency division on first and second clock signals outputted from the first and second oscillators. The first and second counters count the number of clocks of the first and second clock signals in the first and second periods of first and second frequency dividing signals outputted from the first and second frequency dividers. The determination unit determines whether one of the first and second clock signals is abnormal on the basis of the counting results of the first and second counters. The specification unit specifies which one of the first and second clock signals is abnormal when one of the first and second clock signals is found to be abnormal.

Inventors:

FUJIMURA TAKASHI (JP)
KIRA TAKASHI (JP)

Application Number:

PCT/JP2022/045459

Publication Date:

September 07, 2023

Filing Date:

December 09, 2022

Export Citation:

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Assignee:

ROHM CO LTD (JP)

International Classes:

G06F1/06; G06F1/04; H03K5/26

Foreign References:

JPH0316442A	1991-01-24
JP2017199104A	2017-11-02
JPS6235930A	1987-02-16

Attorney, Agent or Firm:

SANO PATENT OFFICE (JP)

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