MOS-CONTROLLED THYRISTOR ELEMENT

WIPO Patent Application WO/2021/251764

A1

A MOS-controlled thyristor element according to the concept of the present invention comprises a substrate comprising first and second surfaces facing each other, gate patterns disposed on the first surface, a cathode electrode covering the gate patterns, and an anode electrode disposed on the second surface. The substrate comprises a lower emitter layer having a first conductive type, a lower base layer disposed on the lower emitter layer so as to have a second conductive type, an upper base area provided on the upper portion of the lower base layer so as to have a first conductive type, the upper base area exposing a part of the upper surface of the lower base layer, an upper emitter area provided on the upper portion of the upper base area so as to have a second conductive type, a first doping area provided on the upper portion of the upper emitter area so as to have a first conductive type, a second doping area surrounded from the first doping area so as to have a second conductive type, and a first doping pattern provided on a side surface of the upper portion of the upper emitter area so as to have a first conductive type. The first doping pattern is interposed between the upper base area and the first doping area along a first direction parallel to the upper surface of the substrate. The first doping pattern exposes the upper surface of the upper emitter area from another side surface of the upper portion of the upper emitter area. Each of the gate patterns covers the exposed upper surface of the lower base layer, the exposed upper surface of the upper base area, the exposed upper surface of the upper emitter area, the first doping pattern, and a part of the first doping area. The cathode electrode covers the upper and side surfaces of the gate pattern, the upper surface of the second doping area, and a part of the upper surface of the first doping area. The first conductive type and the second conductive type differ from each other.

JPH0531262	[Name of invention] Semiconductor device
JPS63265155	ION SENSOR
JPS5932169	OPTICAL THYRISTOR

PARK KUN SIK (KR)
WON JONG IL (KR)
CHO DOO HYUNG (KR)
JUNG DONG YUN (KR)
JANG HYUN GYU (KR)

PCT/KR2021/007261

December 16, 2021

June 10, 2021

Click for automatic bibliography generation  

ELECTRONICS & TELECOMMUNICATIONS RES INST (KR)

H01L29/749; H01L29/10; H01L29/66; H01L29/745

JP4001249B2	2007-10-31
US20110233380A1	2011-09-29
US20150349104A1	2015-12-03
JP2011055017A	2011-03-17
JP4371521B2	2009-11-25

KWON SUNG-KYU; CHO DOO-HYUNG; WON JONG-II: "Structural Design and Simulation of MOS Controlled Thyristor with 0V Turn-off Capability", PROCEEDINGS OF AUTUMN ANNUAL CONFERENCE OF IEIE, 2020, 31 October 2020 (2020-10-31), pages 157 - 160, XP009532748
KWON SUNG-KYU, CHO DOO-HYUNG, WON JONG-IL, JANG HYUN-GYU, JUNG DONG-YUN, LEE JOO-SUNG, KWAK CHANG-SUB, PARK KUN-SIK: "Design and Characterization of N-MCT with Low Vth Off-FET for High Current-drive Capability", JSTS:JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 20, no. 6, 31 December 2020 (2020-12-31), pages 533 - 542, XP055879678, ISSN: 1598-1657, DOI: 10.5573/JSTS.2020.20.6.533

KORYO IP & LAW (KR)

View/Download PDF      PDF Help

Previous Patent: CIRCUIT BOARD

Next Patent: METHOD FOR TRANSMITTING AND RECEIVING SIGNAL IN WIRELESS COMMUNICATION SYSTEM, AND APPARATUS FOR SUP...