Title:
MOS TRANSISTOR, MEMORY AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2023/184914
Kind Code:
A1
Abstract:
Provided in the embodiments of the present application are an MOS transistor, a memory and a manufacturing method therefor. In the MOS transistor provided by the embodiments of the present application, a source structure, a metal oxide semiconductor structure and a drain structure are arranged to be a stacked structure in the direction perpendicular to a base substrate, and orthographic projections of the source structure, the metal oxide semiconductor structure and the drain structure on the base substrate at least partially overlap, so that the structure of the MOS transistor can be simplified and the difficulty for manufacturing the MOS transistor can be reduced, thus reducing the manufacturing difficulty of a memory using the MOS transistor, and reducing the manufacturing cost of the memory using the MOS transistor. In addition, the size of the MOS transistor can be reduced, so that the number of MOS transistors accommodated in a memory can be increased, which facilitates the integration of the memory using the MOS transistors and further reduces the manufacturing cost of the memory.
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Inventors:
DAI JIN (CN)
YIN XIAOMING (CN)
ZHOU JUN (CN)
YIN XIAOMING (CN)
ZHOU JUN (CN)
Application Number:
PCT/CN2022/122900
Publication Date:
October 05, 2023
Filing Date:
September 29, 2022
Export Citation:
Assignee:
BEIJING SUPERSTRING ACADEMY OF MEMORY TECH (CN)
International Classes:
H01L29/78; H01L29/24; H01L29/423
Foreign References:
| CN114242780A | 2022-03-25 | |||
| US20140203350A1 | 2014-07-24 | |||
| US20150228775A1 | 2015-08-13 | |||
| US10090412B1 | 2018-10-02 |
Attorney, Agent or Firm:
LIFANG & PARTNERS (CN)
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