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Title:
MOS TRANSISTOR RESISTOR, FILTER, AND INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2010/004732
Kind Code:
A1
Abstract:
Disclosed is a MOS transistor resistor that is equipped with a first MOS transistor (M1), which is used as a resistor, an input voltage source (1), which is connected, and applies an input voltage (Vin), to the source of the first MOS transistor, and a gate voltage source (6), which is connected, and applies a gate voltage (Vg), to the gate of the first MOS transistor. The gate voltage (Vg) and input voltage (Vin) are set in a range to cause the first MOS transistor to operate with the gate–source voltage and the source–drain voltage in the first MOS transistor in the unsaturated zone, and are set so that the temperature characteristics at the resistance value of the first MOS transistor become constant. Fluctuations in resistance value, which are caused by changes in leakage current due to manufacturing variances, are decreased and excellent temperature characteristics are obtained.

Inventors:
OZASA MASAYUKI
MASAI SHIGEO
KOBAYASHI HITOSHI
YAMASAKI SHUYA
Application Number:
PCT/JP2009/003160
Publication Date:
January 14, 2010
Filing Date:
July 07, 2009
Export Citation:
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Assignee:
PANASONIC CORP (JP)
OZASA MASAYUKI
MASAI SHIGEO
KOBAYASHI HITOSHI
YAMASAKI SHUYA
International Classes:
H01L21/822; H03H11/24; H01L27/04; H03H11/04
Foreign References:
JP2003283301A2003-10-03
JPS58103219A1983-06-20
JP2005347974A2005-12-15
Attorney, Agent or Firm:
IKEUCHI SATO & PARTNER PATENT ATTORNEYS (JP)
Patent business corporation Ikeuchi and Sato and partners (JP)
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