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Title:
MOVING PICTURE ENCODING OR DECODING SYSTEM AND MOVING PICTURE ENCODING OR DECODING METHOD
Document Type and Number:
WIPO Patent Application WO/2005/062621
Kind Code:
A1
Abstract:
[PROBLEMS] To provide a moving picture encoding or decoding system and moving picture encoding or decoding method capable of reducing power consumption as compared to the conventional technique. [MEANS FOR SOLVING PROBLEMS] The moving picture encoding or decoding system includes: necessary operation amount calculation means (2) for calculating an operation amount necessary for encoding or decoding of the current frame; and operation power voltage/substrate bias voltage/operation frequency calculation means (3) for calculating the operation power voltage, substrate bias voltage, and operation frequency capable of encoding or decoding the necessary operation amount within a time assigned to the current frame encoding or decoding. A processor (1) performs encoding or decoding of the current frame while performing a constant operation with the operation frequency, the operation power voltage, and the substrate bias voltage calculated.

Inventors:
YOSHIMOTO MASAHIKO (JP)
KAWAKAMI KENTARO (JP)
KANAMORI MIWAKO (JP)
MORITA YASUHIRO (JP)
OHIRA HIDEO (JP)
Application Number:
PCT/JP2004/018312
Publication Date:
July 07, 2005
Filing Date:
December 08, 2004
Export Citation:
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Assignee:
KANAZAWA UNIVERSITY TECHNOLOGY (JP)
YOSHIMOTO MASAHIKO (JP)
KAWAKAMI KENTARO (JP)
KANAMORI MIWAKO (JP)
MORITA YASUHIRO (JP)
OHIRA HIDEO (JP)
International Classes:
H04N7/24; H04N7/26; H04N7/50; (IPC1-7): H04N7/24
Foreign References:
JP2003324735A2003-11-14
Other References:
KAWAGUCHI H. ET AL: "An LSI for Vdd-Hopping and MPEGI System Based on the Chip.", IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEM., no. 5, 2001, pages 918 - 921, XP010542007
LEE S. ET AL: "Run-time Voltgae Hopping for low-power Real-time Systems.", PROC.DESIGN AUTOMATION CONFERENCE, BEIKOKU, IEEE., no. 6, 2000, pages 806 - 809, XP002991852
KAO J.T. ET AL: "A 175-mV Multiply-Accumulate Unit Using an Adaptive Supply Voltage and Body Bias Architecture.", IEEE JOURNAL OF SOLID-STATE CIRCUITS., vol. 37, no. 11, 2002, pages 1545 - 1554, XP001222652
NOSE K. ET AL: "VTH-Hopping Scheme to Reduce Subthreshold Leakage for low-Power Processors.", IEEE JOURNAL OF SOLID-STATE CIRCUITS., vol. 37, no. 3, 2002, pages 413 - 419, XP001222672
KAWAKAMI K. ET AL: "Feedforward Doteki Den'atsu Seigyo ni yoru MPEG4 Teishohi Denryokuka Algorithm.", THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS GIJUTSU KENKYU HOKOKU ICD2002-57 NIPPON, THE INSTITUTE OF ELECTRONICS., no. 8, 2002, pages 67 - 72, XP002991853
KAWAKAMI K. ET AL: "Feedforward-Gata Doteki Den'atsu Seigyo ni yoru MPEG4 Teishohi Denryokuka Algorithm.", THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATIONS ENGINEERS GIJUTSU KENKYU HOKOKU ICD2003-30., no. 5, 2003, pages 25 - 30, XP002991854
MORITA Y. ET AL: "'D-23 Feedforward Seigyo o Mochiita MPEG4 Tesihohi Denryokuka Algorithm (2) -2 Dankai Dosa Den'atsu_shuhasu Seigyo Tekiyoji no Shohi Denryoku Sakugen Koka no Mitsumori.", HEISEI 15 NENDO INSTITUTES OF ELECTRICAL AND INFORMATION ENGINEERS, JAPAN HOKURIKU SHIBU RENGO TAIKAI KOEN RONBUNSHU., 22 September 2003 (2003-09-22), pages 192, XP002991855
Attorney, Agent or Firm:
Kimori, Yuhei (4-4-25 Sainen, Kanazawa-sh, Ishikawa 24, JP)
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