MULTI-FREQUENCY SYNCHRONIZING CLOCK SIGNAL GENERATOR

Title:

MULTI-FREQUENCY SYNCHRONIZING CLOCK SIGNAL GENERATOR

Document Type and Number:

WIPO Patent Application WO2004082143

Kind Code:

A3

Abstract:

An apparatus (Fig.2) and method for generating a plurality of synchronizing signals for synchronizing operation of the device in which the apparatus is located, such as in semiconductor memory devices. The apparatus can generate a plurality of synchronizing signals (CLKSYNC) based on a corresponding plurality of input clock signals (CLK ) and select one of the synchronizing signals to be provided as the synchronizing clock signal (CLK DEL). Alternatively, the apparatus can generate a plurality of internal clock signals (CLK1, CLK2). based on an input clock signal (CLK), and generate a corresponding plurality of synchronizing signals from the plurality of internal clock signals. One of the synchronizing signals is selected by the apparatus as the synchronizing clock signal. Alternatively, the apparatus can receive a clock signal, generate a synchronized clock signal therefrom, and generate a synchronizing pulse in response to number of periods of the synchronized clock signal, the number based on a selection signal provided to the apparatus.

Inventors:

CHOI JOO S (US)

Application Number:

PCT/US2004/007499

Publication Date:

April 28, 2005

Filing Date:

March 12, 2004

Export Citation:

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Assignee:

MICRON TECHNOLOGY INC (US)
CHOI JOO S (US)

International Classes:

G11C7/10; G11C7/22; G11C11/4076; (IPC1-7): G11C8/00

Foreign References:

US5254888A

1993-10-19

Other References: