Title:
MULTI-TERMINAL MULTI-LAYER CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2022/034797
Kind Code:
A1
Abstract:
This multi-terminal multi-layer capacitor (1) comprises: a plurality of first vias (21) and a plurality of second vias (22) that are arranged inside a first internal electrode (11) and a second internal electrode (12), and that penetrate in the lamination direction; first slits (31) formed to extend between the first vias (21) and first insulation parts (111) that insulate the second vias (22) and the first internal electrode (11); and second slits (32) formed to extend between the second vias (22) and second insulation parts (121) that insulate the first vias (21) and the second internal electrode (12). The first vias (21) are arranged to electrically connect a plurality of regions of the first internal electrode (11) divided by the first slits (31), and the second vias (22) are arranged to electrically connect a plurality of regions of the second internal electrode (12) divided by the second slits (32).
Inventors:
HIDAKA SEIJI (JP)
FUJITA YUKIHIRO (JP)
FUJITA YUKIHIRO (JP)
Application Number:
PCT/JP2021/027872
Publication Date:
February 17, 2022
Filing Date:
July 28, 2021
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G4/30; H01G4/232; H01G4/38
Foreign References:
| JP2003059755A | 2003-02-28 | |||
| JP2006135333A | 2006-05-25 | |||
| JP2002160467A | 2002-06-04 | |||
| JP2001148325A | 2001-05-29 |
Attorney, Agent or Firm:
UEDA Kazuhiro (JP)
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