Title:
MULTILAYER STRUCTURE, SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/145912
Kind Code:
A1
Abstract:
The present invention provides: a multilayer structure which is reduced in deterioration at high temperatures and is useful especially for power devices; a semiconductor element; and a semiconductor device. The present invention provides a multilayer structure which is provided with at least a semiconductor layer that contains, as a main component, a crystalline oxide semiconductor, and a conductive substrate that is superposed on the semiconductor layer, wherein: the multilayer structure has a first direction and a second direction, which is perpendicular or generally perpendicular to the first direction, within a plane that is perpendicular to the stacking direction of the multilayer structure; a first linear expansion coefficient that is the linear expansion coefficient of the conductive substrate in the first direction is lower than a second linear expansion coefficient that is the linear expansion coefficient of the conductive substrate in the second direction; and a third linear expansion coefficient that is the linear expansion of the semiconductor layer in the first direction is lower than a fourth linear expansion coefficient that is the linear expansion coefficient of the semiconductor layer in the second direction.
Inventors:
OKA MUTSUMI (JP)
TERAI ATSUSHI (JP)
SHIBATA HIDETAKA (JP)
TERAI ATSUSHI (JP)
SHIBATA HIDETAKA (JP)
Application Number:
PCT/JP2023/002756
Publication Date:
August 03, 2023
Filing Date:
January 27, 2023
Export Citation:
Assignee:
FLOSFIA INC (JP)
International Classes:
H01L29/78; H01L21/329; H01L21/336; H01L21/365; H01L21/368; H01L21/52; H01L29/12; H01L29/739; H01L29/872
Domestic Patent References:
| WO2021157720A1 | 2021-08-12 | |||
| WO2021157719A1 | 2021-08-12 |
Foreign References:
| JP2016081946A | 2016-05-16 | |||
| JP2020107636A | 2020-07-09 | |||
| JP2020107635A | 2020-07-09 |
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