Title:
MULTILAYER SUBSTRATE, INTEGRATED MAGNETIC DEVICE, POWER SOURCE APPARATUS, AND MULTILAYER SUBSTRATE PRODUCTION METHOD
Document Type and Number:
WIPO Patent Application WO/2022/196265
Kind Code:
A1
Abstract:
[Problem] To provide a technology that enables reduction in thermal resistance of a multilayer substrate. [Solution] The multilayer substrate according to the present invention comprises: a plurality of substrates in which conductors are wired; and an insulation material to which first insulation particles each having a first particle diameter are added. The multilayer substrate has a lamination structure such that, in two of the substrates adjacent to each other among the plurality of substrates having been laminated, the first insulation particles, each having the first particle diameter substantially the same as the interval between the conductors on the two substrates, are disposed so as to be respectively brought into contact with the conductors wired on the adjacent two substrates.
Inventors:
TAHARA HIROMITSU (JP)
Application Number:
PCT/JP2022/007283
Publication Date:
September 22, 2022
Filing Date:
February 22, 2022
Export Citation:
Assignee:
NEC PLATFORMS LTD (JP)
NEC CORP (JP)
NEC CORP (JP)
International Classes:
H01F17/00; H01F27/28; H01F30/10; H05K1/14; H05K1/16; H05K3/36; H05K3/46
Domestic Patent References:
| WO2017126357A1 | 2017-07-27 | |||
| WO2017208332A1 | 2017-12-07 | |||
| WO2017221476A1 | 2017-12-28 |
Foreign References:
| JP2002530900A | 2002-09-17 | |||
| JP2007180105A | 2007-07-12 | |||
| JP2001160510A | 2001-06-12 | |||
| JP2008066529A | 2008-03-21 | |||
| JP2019008291A | 2019-01-17 | |||
| JPH04174980A | 1992-06-23 | |||
| JP2013207115A | 2013-10-07 | |||
| JP2013175657A | 2013-09-05 | |||
| JP2021045546A | 2021-03-25 |
Attorney, Agent or Firm:
KITAJIMA Hiroshi et al. (JP)
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