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Patent Searching and Data


Title:
NOISE FILTER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2020/179047
Kind Code:
A1
Abstract:
This noise filter circuit (100) is provided with: a first ground line (6a) having one end connected to a first connection point (5a) between a first input line (1a) and a first output line (2a), and the other end connected to a ground; a first capacitor (7a) inserted into the first ground line (6a); a second ground line (6b) having one end connected to a second connection point (5b) between a second input line (1b) and a second output line (2b), and the other end connected to a ground; a second capacitor (7b) inserted into the second ground line (6b); a connection line (8) having one end connected to the first input line (1a), and the other end connected to the second input line (1b); and a third capacitor (9) inserted into the connection line (8), wherein an inductance reduction circuit (10) reduces a first parasitic inductance which is the total sum of a parasitic inductor possessed by the first ground line (6a) and a parasitic inductor possessed by the first capacitor (7a), reduces a second parasitic inductance which is the total sum of a parasitic inductor possessed by the second ground line (6b) and a parasitic inductor possessed by the second capacitor (7b), and reduces a third parasitic inductance which is the total sum of a parasitic inductor possessed by the connection line (8) and a parasitic inductor possessed by the third capacitor (9).

Inventors:
OTSUKA KYOTA (JP)
HIROSE KENJI (JP)
Application Number:
PCT/JP2019/009006
Publication Date:
September 10, 2020
Filing Date:
March 07, 2019
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H03H7/09
Domestic Patent References:
WO2018025342A12018-02-08
Foreign References:
JP2004236059A2004-08-19
JPH0358512A1991-03-13
JPS60167510A1985-08-30
Attorney, Agent or Firm:
TAZAWA, Hideaki et al. (JP)
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