NUMERICAL CONTROL UNIT - FUJITSU FANUC LTD

Title:

NUMERICAL CONTROL UNIT

Document Type and Number:

WIPO Patent Application WO/1982/001598

Kind Code:

A1

Abstract:

A numerical control unit which is able to perform a bit-operation by executing instructions provided for a usual microprocessor so as to shorten a processing time. A read-cycle is provided with a selector (SE1) to output the data of a special bit in the data read out from a random access memory (RAM) or an input device onto a special bit line in the data bus (BUS1) of a processor (CPU), which makes it possible to read out bit by bit, and a write-cycle is provided with a memory means (RE) for temporarily storing the data of the address designated by the random access memory (RAM) or the output device, and selectors (SE2 to SE17) for applying the data output from the special bit-line of the data bus (BUS1) of the processor (CPU) onto a special bit of the designated address of the random access memory (RAM) or the output device and simultaneously for applying the data stored in the memory means (RE) onto other bits, which makes it possible to write-in bit by bit.

Inventors:

ISOBE SHINICHI (JP)
YONEKURA MIKIO (JP)

Application Number:

PCT/JP1981/000307

Publication Date:

May 13, 1982

Filing Date:

October 28, 1981

Export Citation:

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Assignee:

FUJITSU FANUC LTD (JP)
ISOBE SHINICHI (JP)
YONEKURA MIKIO (JP)

International Classes:

G05B15/02; G05B19/05; G06F9/30; (IPC1-7): G05B19/02

Foreign References:

JPS5595109A

1980-07-19

Other References: