Title:
PHASE ADJUSTMENT CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2024/013883
Kind Code:
A1
Abstract:
In the present invention, a phase adjustment circuit comprises: a sine wave output unit (16) that outputs two sine wave signals with a fixed phase difference; multiplication units (5, 6) that output signals derived by multiplying the amplitude of the two signals outputted from the sine wave output unit (16) sby A, B; an amplitude detection unit (9) that detects the output amplitude of an addition unit (7); a differential amplifier unit (10) that subtracts the detection result from the amplitude detection unit (9) from a target amplitude (Vref), and amplifies the result; a multiplication unit (12) that delivers to the multiplication unit (5), as the control signal that determines variable A, a signal derived by multiplying the amplitude of the output signal of an LPF (11) by Vratio1; and a multiplication unit (13) that delivers to the multiplication unit (6), as the control signal that determines variable B, a signal derived by multiplying the amplitude of the output signal of the LPF (11) by Vratio2.
Inventors:
TAKEYA TSUTOMU (JP)
NAGATANI MUNEHIKO (JP)
TAKAHASHI HIROYUKI (JP)
WAKITA HITOSHI (JP)
JO TERUO (JP)
NAGATANI MUNEHIKO (JP)
TAKAHASHI HIROYUKI (JP)
WAKITA HITOSHI (JP)
JO TERUO (JP)
Application Number:
PCT/JP2022/027567
Publication Date:
January 18, 2024
Filing Date:
July 13, 2022
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
H03H11/16
Domestic Patent References:
| WO2017149699A1 | 2017-09-08 |
Foreign References:
| JP2013118555A | 2013-06-13 | |||
| JP2008028681A | 2008-02-07 | |||
| JP2008017219A | 2008-01-24 |
Attorney, Agent or Firm:
YAMAKAWA, Shigeki et al. (JP)
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