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Title:
PHASE LOCK LOOP, RADAR SYSTEM, AND METHOD FOR RANDOMIZING INITIAL PHASE OF FMCW SIGNAL
Document Type and Number:
WIPO Patent Application WO/2023/165216
Kind Code:
A1
Abstract:
A phase lock loop, a radar system, and a method for randomizing an initial phase of an FMCW signal. The phase lock loop comprises a phase lock circuit (100) and a random control signal generator (200). Every time a clock signal reaches a target point in time, the random control signal generator (200) inputs a random control signal to the phase lock circuit (100), so that an accumulated value of fractional division values of the phase lock circuit (100) is changed to a random value, and thus in a plurality of chirp signals output by the phase lock circuit (100), an initial phase difference of a spurious signal relative to a main signal is in not in a constant-difference change. Speed information caused by the spurious signal is distributed on different speed dimensions, so that the intensity of the spurious signal on a single speed dimension is reduced, two false signals having fixed speeds are avoided, and the detection accuracy of the radar system is improved; in addition, the phase of each chirp signal is randomly changed, so that the anti-interference capability of the radar system is improved.

Inventors:
YANG JIANWEI (CN)
ZHOU WENTING (CN)
Application Number:
PCT/CN2022/138798
Publication Date:
September 07, 2023
Filing Date:
December 13, 2022
Export Citation:
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Assignee:
CALTERAH SEMICONDUCTOR TECH SHANGHAI CO LTD (CN)
International Classes:
H03L7/18; H03L7/085
Foreign References:
US20080284531A12008-11-20
CN105049039A2015-11-11
CN109936365A2019-06-25
CN111693996A2020-09-22
US20190089368A12019-03-21
US20190260617A12019-08-22
US20210399734A12021-12-23
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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