PHASE SYNCHRONIZATION CIRCUIT AND METHOD FOR CONTROLLING SAME

WIPO Patent Application WO/2017/150241

A1

The present technology relates to a phase synchronization circuit and a method for controlling same, with which power consumption is low and phase noise can be improved while suppressing an increase in circuit area. The phase synchronization circuit comprises a digitally-controlled oscillator that controls oscillation frequency using a digital control signal, a multiphase clock generation unit that generates clock signals having various phases synchronized with the digitally-controlled oscillator, a clock selection unit that selects a selected clock signal from among the clock signals having various phases, a time-to-digital converter that detects the time difference between the selected clock signal and a reference clock signal, a counter unit that is driven by one of the clock signals having various phases, a reference phase generation unit that generates a reference phase, a phase comparison unit that compares the reference phase against feedback phase information obtained from the value output by the counter unit and the value output by the time-to-digital converter, and a digital loop filter unit that generates a control signal for the digitally-controlled oscillator.

TAMURA MASAHISA (JP)
SAKAZUME SHUNSUKE (JP)
MATSUBARA TAKESHI (JP)
YAMAMOTO KEN (JP)

PCT/JP2017/006078

September 08, 2017

February 20, 2017

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SONY CORP (JP)

H03L7/08; H03L7/16; H03L7/081; H03L7/183

WO2010143241A1

2010-12-16

JP2014017804A	2014-01-30
JP2008205730A	2008-09-04
JP2007110370A	2007-04-26
JP2015154444A	2015-08-24

NISHIKAWA Takashi et al. (JP)

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