FIELD

[0001] The disclosure pertains generally to quantum information processing, and particularly to achieving usefully low qubit error rates.

BACKGROUND

[0002] Achieving quantum fault-tolerance is by far the single greatest challenge that stands in the way of most real-world applications for quantum information processing. Although enormous progress has been made across different physical qubit modalities in decreasing their physical error rates, even the most advanced demonstrations of protected or encoded qubits have still not yet reached error rates at the so-called threshold below which quantum error correction begins to become effective. Furthermore, since the physical resources needed to implement error correction increase at least exponentially as the error threshold is approached from below, one needs to achieve physical error rates well below this threshold before quantum error correction can have any hope of being useful.

[0003] Moreover, it is far from certain that lower error rates are achievable using leading physical qubit modalities such as superconducting Josephson circuits and trapped atomic ions. In both cases, the fundamental single and two-qubit gate operations are very highly developed and running up against fundamental limitations in their physical noise sources. For example, the coherence of superconducting circuits is known to be limited by lossy/noisy surface and/or interface layers associated with the superconducting metals used. Researchers have been trying to understand and limit these noise sources for nearly 30 years, and although there was substantial progress at first, the achievable coherence has essentially saturated in the last five years. While it is possible that this impasse might be broken with an industrial level of effort such as that which made modern semiconductor circuits possible, there is no specific evidence to suggest this will be the case, since the underlying microscopic noise mechanisms are still not completely understood. SUMMARY OF DISCLOSED EMBODIMENTS

[0004] Disclosed embodiments use a layer of purely-passive quantum error suppression at the lowest level in superconducting circuits, before any active quantum error correction protocols are implemented. This has two important advantages. First, it enables existing superconducting qubit technology to achieve error rates sufficiently low to achieve quantum fault tolerance; and second, it“preconditions” the errors at the physical layer, removing structure and bias and allowing them to be corrected more efficiently. This latter point is important because the proof that fault-tolerance is even possible relies on highly idealized error models which are not representative of any real physical system, and preconditioning will likely make the noise remaining after the passive error suppression layer closer to these simplified models.

[0005] Thus, a first embodiment is a method of error suppression. The method includes, in a first level, encoding a quantum state of a logical qubit using a passive quantum error-suppressing code to generate an encoded quantum state. The method also includes, in a second level, encoding the encoded quantum state using an active quantum error-correcting code. Performing the encoding in the first level suppresses an effective error rate seen by the encoding in the second level.

[0006] In some embodiments, the passive quantum error-suppressing code comprises a code having distance two.

[0007] In some embodiments, the active quantum error-correcting code comprises a code having distance at least three.

[0008] In some embodiments, the logical qubit comprises a plurality of physical qubits, the method further comprising the plurality of physical qubits interacting according to check operators of the passive quantum error-suppressing code with a negative coefficient, whereby introduction of a logical error by local physical noise requires an environmental energy greater than the interaction strength between at least two physical qubits. In embodiments, the environment energy is an ambient noise energy, which may be a thermal noise energy.

[0009] Some embodiments further include the logical qubit interacting, in the first level, with each of a plurality of other logical qubits using a respective inductive coupling site, of the logical qubit, according to a four-physical-qubit operator.

[0010] In some such embodiments, each respective interacting comprises first coupling, to a multispin resonator, an inductive coupling site of the logical qubit; then coupling, to the multispin resonator, an inductive coupling site of a logical qubit in the plurality of other logical qubits; and then modulating the two inductive coupling sites according to a pulse.

[0011] Some such embodiments further include concatenating the logical qubit and the plurality of other logical qubits in the first level to form a logical qubit in the second level, wherein the active quantum error-correcting code in the second level is implemented by the modulations of the logical qubit interacting with the other logical qubits according to the suppressed effective error rate.

[0012] A second embodiment is a device comprising a logical qubit having a quantum state that has been encoded, in a first level, according to a passive quantum error-suppressing code to generate an encoded quantum state, the encoded quantum state having been further encoded, in a second level, according to an active quantum error-correcting code, wherein the encoding in the first level suppresses an effective error rate seen by the encoding in the second level.

[0013] In some embodiments, the passive quantum error-suppressing code comprises a code having distance two.

[0014] In some embodiments, the active quantum error-correcting code comprises a code having distance at least three.

[0015] In some embodiments, the logical qubit comprises a plurality of physical qubits interacting according to check operators of the passive quantum error- suppressing code with a negative coefficient, whereby introduction of a logical error by local physical noise requires an environmental energy greater than the interaction strength between at least two physical qubits.

[0016] Some embodiments further include a plurality of other logical qubits, wherein the logical qubit and each of the plurality of other logical qubits are coupled by respective inductive coupling sites.

[0017] In some such embodiments, the respective inductive coupling sites are modulated according to a pulse to cause the logical qubit and the respective other logical qubit to interact in the first level.

[0018] In some such embodiments, the logical qubit and the plurality of other logical qubits in the first level are concatenated to form a logical qubit in the second level, wherein the active quantum error-correcting code in the second level is implemented by the modulations of the logical qubit interacting with the other logical qubits according to the suppressed effective error rate. [0019] A third embodiment is an error suppression device for a logical qubit. The error suppression device includes first means for encoding in a first level a quantum state of a logical qubit using a passive quantum error-suppressing code to generate an encoded quantum state. The error suppression device also includes second means for encoding in a second level the encoded quantum state using an active quantum error-correcting code. In the error suppression device, performing the encoding in the first level suppresses an effective error rate seen by the encoding in the second level.

[0020] In some embodiments, the passive quantum error-suppressing code comprises a code having distance two.

[0021] In some embodiments, the active quantum error-correcting code comprises a code having distance at least three.

[0022] In some embodiments, the logical qubit comprises a plurality of physical qubits, the device further comprising the plurality of physical qubits interacting according to check operators of the passive quantum error-suppressing code with a negative coefficient, whereby introduction of a logical error by local physical noise requires an environmental energy greater than the interaction strength between at least two physical qubits. In embodiments, the environment energy is ambient noise energy which may correspond to a thermal noise energy.

[0023] In some embodiments, the first means is provided as a logical qubit having a quantum state that has been encoded, in a first level, according to a passive quantum error-suppressing code to generate an encoded quantum state.

[0024] In some embodiments, the second means is provided as an active quantum error-correcting code, with the first and second means interacting such that the encoding in the first level suppresses an effective error rate seen by the encoding in the second level.

[0025] It is appreciated that repeating the concepts, techniques, and structures of the above-described embodiments allows formation of quantum circuitry for performing computations of arbitrary complexity while retaining the much loser physical error rates associated with passive error suppression.

DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

[0026] The manner and process of making and using the disclosed embodiments may be appreciated by reference to the drawings, in which:

[0027] Figure 1 schematically shows energy states of a physical qubit; [0028] Figure 1A schematically shows energy states of a logical qubit;

[0029] Figure 1 B schematically shows an embodiment of a logical qubit comprising four physical qubits and using a distance-2 Bacon-Shor code, whose encoding requires two-qubit physical couplings;

[0030] Figure 1 C schematically shows an embodiment of two such logical qubits coupled by a logical ZZ interaction, realized by a four-qubit physical coupling;

[0031] Figure 1 D schematically shows an embodiment of a logical qubit comprising five physical qubits using a distance-2 surface code, whose encoding requires three- qubit physical couplings;

[0032] Figure 1 E schematically shows an embodiment of two distance-2 surface code logical qubits coupled by a logical ZZ interaction, realized by a four-qubit physical coupling;

[0033] Figure 2 schematically shows a distance-3 surface code logical qubit with physical-layer passive quantum error suppression based on the distance-2 Bacon- Shor code shown in Figures 1 B and 1 C;

[0034] Figure 3 shows an illustrative physical realization of the distance-2 Bacon- Shor logical qubit embodiment shown in Figure 1 B for passive quantum error suppression;

[0035] Figure 3A shows an illustrative physical realization of two such logical qubits coupled by a logical ZZ interaction using a pulsed four-qubit physical coupling based on geometric phase gates;

[0036] Figure 3B shows an illustrative physical realization of two logical qubits coupled by logical XX interaction using a pulsed four-qubit physical coupling based on geometric phase gates;

[0037] Figure 3C shows an illustrative physical realization of two distance-2 data qubits coupled to a distance-2 ancilla qubit by pulsed ZZXX interactions; and

[0038] Figure 4 shows an illustrative physical realization of the logical qubit embodiment shown in Figure 2, built out of the components shows in Figs. 3-3C.

DETAILED DESCRIPTION

[0039] Figure 1 schematically shows energy states of a physical qubit used to represent a spin-1/2. Figure 1A shows the principle of passive quantum error suppression, in which the two physical spin states of Fig. 1 are replaces by encoded logical states of an assemblage of interacting physical qubits, such that an energy barrier occurs, for any single-qubit error process, between the two encoded logical qubits states. This energy barrier is made greater by increasing the interaction strength between physical qubits. As used herein, the“interaction strength” refers to the strength of the interactions engineered to be proportional to the negative of the check operators. If this barrier is made much greater than that available from any environmental source of noise (for example, thermal energy), it has the effect of passively suppressing any noise-induced transitions between logical states. This protection is passive because it does not require any active intervention from outside (as in quantum error correction); furthermore, if a physical error process does occur which takes the system onto the top of the barrier, a logical error will occur with probability 1/2 when the system decays back into the code space (since either logical state is equally likely after this occurs).

[0040] The above limitation associated with distance-2 is well known, and it is for this reason that active error correction methods always use codes with distance 3 or greater. Here we do the same, but we replace the physical qubits in a distance 3 (or greater) code with the passively protected distance-2 logical qubits described above.

In this scheme, the passive error suppression is used to effectively reduce the physical error rate which enters the subsequent active quantum error-correction. That is, physical qubits are combined into logical qubits having an internal energy barrier between logical states, and these logical qubits participate in a higher-level fault- tolerance architecture. This is known as code“concatenation,” except that here, unlike the conventional case, the lowest level of encoding involves purely static, passive error suppression rather than active error correction, and therefore does not increase the circuit complexity or reduce the speed of gate operations, as is the case in conventional code concatenation. Thus, the present scheme can be much simpler, faster, and more scalable.

[0041] In this connection, Figure 1 B schematically shows an embodiment of a logical qubit 100 comprising four physical qubits based on a distance-2 Bacon-Shor code. The logical qubit 100 includes four physical qubits numbered 1 through 4. As illustrated in Figure 3 in more detail, physical qubits 1 and 2 are coupled by a strong ZZ interaction using a two-qubit coupler 102, physical qubits 3 and 4 are coupled by a strong ZZ interaction using a two-qubit coupler 104, physical qubits 1 and 3 are coupled by a strong XX (or YY) interaction using a two-qubit coupler 106, and physical qubits 2 and 4 are coupled by a strong XX (or YY) interaction using a two-qubit coupler 108. This realizes the level structure shown in Figure 1A.

[0042] Figure 1 C schematically shows an embodiment of two such logical qubits 100 and 1 10 coupled by a (logical) ZZ interaction, via a four-qubit physical coupling 112. A physical realization of such an embodiment is shown in Figure 3B, which can realize pulsed four-qubit interactions in conjunction with an extension of the methods described in“Quantum Information Processing Using Quasiclassical Electromagnetic Interactions Between Qubits and Electrical Resonators,” Andrew J Kerman 2013 New J. Phys. 15 12301 1 , hereinafter“Kerman2013”, the entire contents of which are incorporated herein by reference. However, it is appreciated that other physical realizations may use 4-spin couplers 1 12 as described in U.S. Application 15/976,291 filed 2018 May 10, multiloop couplers 1 12 as described in U.S. Application 15/354,275 filed 2016 November 17, or any other multi-qubit coupler 1 12 providing similar functionality. The entire contents of these Applications are incorporated herein by reference.

[0043] Distance-2 Bacon-Shor codes are not the only way to implement quantum error suppression in accordance with the concepts disclosed herein. In this

connection, Figure 1 D schematically shows an embodiment of a logical qubit 120 comprising five physical qubits based on a distance-2 surface code, where the internal interactions required are three-qubit physical couplings. Physical qubits 1 , 2, and 5 of logical qubit 120 are coupled by a strong ZZZ interaction using a three-qubit coupler 122, while physical qubits 3, 4, and 5 are coupled by a strong ZZZ interaction using a three-qubit coupler 124. Likewise, physical qubits 1 , 3, and 5 of logical qubit 120 are coupled by a strong XXX interaction using a three-qubit coupler 126 and physical qubits 2, 4, and 5 are coupled by a strong XXX interaction using a three-qubit coupler 128. Figure 1 E schematically shows an embodiment of two such logical qubits 120 and 130 coupled by a (logical) ZZ interaction again using a four-qubit physical coupling 132 that may be a pulsed operation as in Kerman2013, a 4-spin coupler, or a multiloop coupler as indicated in the above-referenced U.S. Applications.

[0044] The embodiments of Figures 1 B and 1 C have the advantage that the strong interactions internal to the distance-2 logical qubits, and which provide the error suppression, only require pairwise interactions between physical qubits. However, the embodiments of Figures 1 D and 1 E provide greater error suppression. Both sets of embodiments have 2-qubit logical operators, so both need 4-qubit physical interaction to implement a 2-qubit logical interaction. Of course, logical qubits according to the concepts and techniques taught herein may be implemented using other physical designs. For concreteness and not by way of limitation, the specification below focuses on the illustrative embodiments of Figures 1 B and 1 C, with the understanding that the techniques described are equally applicable to other physical realizations.

[0045] Figure 2 shows an example of how this passive quantum error suppression would be incorporated into an active quantum error correction scheme, where in this case the active error correction is based on a distance-3 surface code. What would normally be the physical qubits are replaced with protected distance-2 logical qubits (e.g., groups of four or more physical qubits), e.g. groups 210, 220, 230, and so on. Each such group 210, 220, 230 of physical qubits incorporates strong two-qubit energy penalties based, in this example, on a distance-2 Bacon-Shor code as in Figure 1 B.

[0046] To perform quantum error correction on this distance-3 surface code logical qubit requires the usual pairwise CNOT operations, but now on these composite 4- qubit objects consisting of four physical qubits each. The effective X and Z operators for these protected qubits are two-physical-qubit operators, ZZ and XX, respectively; so, interactions between them are four-qubit operators. In the case of a CNOT gate, they correspond to either XXZZ or ZZXX, depending on which is the control, and which is the target qubit. These four-physical qubit interactions are indicated in the figure by solid rectangles connected to four physical qubits. If performing the usual CNOT operations, these four-physical-qubit interactions would be pulsed on for half a period (that is, for a time equal to the Planck constant h divided by twice the 4-qubit interaction energy) and could be realized either with the methods of Kerman2013, or by explicit physical 4-qubit couplings as in the above-referenced U.S. Applications.

[0047] There are two major ingredients needed for realizing the above construction that have not been available in any physical qubit modality in the prior art. The first such ingredient is strong, static ZZ and XX interactions between qubits that do not require the presence of effective local fields (terms proportional to X, Y, or Z in the Hamiltonian which lift the degeneracy between the two physical qubit states). A basis for this functionality is the“Josephson phase-slip qubit” (JPSQ) described in U.S. Provisional Application 62/737,372. This device is specifically designed to have the property mentioned above, which is also of interest for several other areas in quantum information processing. A physical realization of this device is indicated in Figure 3 and described below.

[0048] The second ingredient is a mechanism for implementing four-physical-qubit gate operations, which correspond to the two-logical qubit gates needed here to realize the surface code, that does not substantially interfere with the disclosed distance-2 error suppression by introducing any two-qubit interaction terms that correspond to the single-logical qubit stabilizers. This functionality can be realized using the multiqubit geometric phase gates described in Kerman2013. Alternatively, such operations could be realized by pulsing on an explicit four-qubit interaction based on the technologies described in the above referenced U.S. Applications.

[0049] Figure 3 shows an illustrative physical realization of the logical qubit 300 embodiment shown in Figure 1 B. The logical qubit 300 includes four identical circuits in mirror image, of which circuit 310 is illustrative. Such a realization requires the use of qubits with true, vector spin-1/2 interactions at zero field offset. The physical properties of the circuit 310, which is a JPSQ, may be more fully appreciated by reference to the above-mentioned JPSQ Application. For purposes of the present disclosure, however, it suffices to note that the horizontal qubit connections are mutual inductances and correspond to ZZ interactions between the two horizontal qubit pairs. The vertical connections are capacitive and correspond to effective YY interactions between the two vertical qubit pairs. These four physical qubits coupled in this manner implement the Bacon-Shor logical qubit of Figure 1 B. The design includes a site 312 for use in XX interactions, and a site 314 for use in ZZ interactions. Note that the YY interactions between the vertical qubit pairs shown here are interchangeable with the above-mentioned XX interactions, for the purposes of realizing quantum error suppression using the distance-2 Bacon-Shor code.

[0050] Figures 3A and 3B, respectively, show circuits designed to implement the four-physical-qubit gate operations that correspond to logical XX and ZZ gates. In Figure 3A, for example, the physical qubit loops corresponding to X operators for four of the JPSQs, in two logical qubits 320 and 330, are coupled via a circuit 332 having tunable couplers 334a-334d and a single resonator 336. According to the methods of Kerman2013, if these couplers 334a-334d are modulated at a frequency near resonance with the resonator 336, a geometric phase accumulates which is

dependent on the state of the corresponding four physical qubits along the X axis. If the modulation is turned off at the correct time, this geometric phase is mapped purely on the qubits’ state, creating the four-qubit XXXX interaction that corresponds to a logical XX interaction. Similarly, Figure 3B gives the equivalent circuit for the physical ZZZZ interaction corresponding to logical ZZ between qubits 340 and 350 using a tunable coupling circuit 352.

[0051] Figure 3C shows an illustrative physical realization of two logical data qubits 360 and 370 coupled to an ancilla qubit 380 via a tunable coupling circuit 382 for a ZZXX interaction. By modulating the four couplers shared by the ancilla qubit 380 with one or the other of the two data qubits 360 and 370, a CNOT gate can be

implemented between the ancilla qubit 380 and the qubit 360 or 370, without affecting the third, bystander data qubit (370 or 360, respectively). This capability is the foundation for the physical realization shown in Fig. 4 and discussed below.

[0052] A crucial element of this scheme is that it involves no direct pairwise interaction between physical qubits, other than those which realize the error suppression. This means that to leading order, there is no mechanism by which environmental fluctuations can couple directly to the logical variables of the protected qubits. That is, the logical CNOT gates between protected qubits are realized in a manner that does not introduce any additional coupling between the environment and the logical operators of the protected qubits, thus preserving the error suppression even in the presence of two-logical-qubit gate operations.

[0053] Figure 4 shows an example of how this concept can be extended to a full, distance-3 surface-code logical qubit 400: the so-called“surf-17” proposed by Tomita and Svore. Although a construction like that shown in Figure 4 appears to increase the resources needed to implement a logical qubit (compared to the conventional method with physical qubits at the lowest level), in fact it may vastly decrease the resources required to achieve a given logical error rate. The quantum threshold theorem, roughly speaking, states that if the physical error rate is below the threshold value then it is always possible to achieve a desired logical error rate; however, the resources needed to do this (in both physical hardware and computation run time) increase at least exponentially as the ratio of the physical error rate to the logical error rate approaches 1 from below. So, any reduction in the effective physical error rate results in a super-exponential reduction in the required resources.

[0054] What the scheme disclosed herein effectively does is replace the bare physical qubit error rate of the conventional scheme with the much lower one that can be achieved using the disclosed, purely-passive, distance-2 error suppression. Although this requires more complex circuits to implement, as shown in Figure 4, the code blocks needed to achieve a given logical error rate will be smaller by an exponential factor compared to the conventional method. For example, using physical qubits one might need a distance-30 surface code block to achieve a certain error rate (consisting of roughly -1000 data qubits plus -1000 ancilla qubits), while using the disclosed method one might need only distance-3 (consisting of 9 protected data qubits plus 8 protected ancilla qubits = 17 protected qubits = 68 physical qubits).

[0055] In the foregoing detailed description, various features of the invention are grouped together in one or more individual embodiments to streamline the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, inventive aspects may lie in less than all features of each disclosed

embodiment.

[0056] Having described implementations which serve to illustrate various concepts, structures, and techniques which are the subject of this disclosure, it will now become apparent to those of ordinary skill in the art that other implementations incorporating these concepts, structures, and techniques may be used. Accordingly, it is submitted that that scope of the patent should not be limited to the described implementations but rather should be limited only by the spirit and scope of the following claims.