Title of the Invention : Pixel Modification Unit

Cross-Reference to Related Application

This application is related to a pending patent application entitled, "Single Chip Page Printer Controller," Serial NO. 07/726,929 filed July 8, 1991, which is incorporated by reference as if set forth in full hereinbelow.

Background of the Invention L Field of the Invention

The present invention relates to the field of computer graphics and, more particularly, to manipulating data stored in a bit map pertaining to a video image to be presented by a raster printer, screen, display device, or other humanly visible manifestation.

II. Related Art

In raster graphics systems, a graphics image is stored in memory and presented to a printer, screen, or display device by representing the image in the form of a matrix of bits. The matrix is referred to as a "bit map" or a "frame buffer." For monochrome systems, one bit in the bit map represents one visible dot, or picture element (pixel, for short), on the display. For gray scale or color systems, several bits in the bit map represent one pixel or group of pixels on the display.

Many types of graphics processors have been designed and implemented in the art for controlling the display of graphics images. Graphics processors dedicated to this task help relieve the processing burden of the controlling processor. Graphics processors are usually designed to not only generate image data, but also manipulate existing image data in the bit map. Typical graphics manipulations include, for example, rotation and translation. "Rotation" refers to moving an image, or parts thereof, about an axis perpendicular to the display. In contrast, "translation" refers to the linear component of movement, i.e. , movement across the display without rotation.

The manipulation of an image requires extensive arithmetic calculations. A reason is that the bit map is dealt with as a coordinate system having an X and a Y component. In order to manipulate a bit in the bit map, both the X and Y components must be considered. In the "X window system," which is an industry standard specification for windowed graphics developed by the Massachusetts Institute of Technology (MIT), Boston, Massachusetts , U.S.A. , sixteen

mathematical operations maybe used in order to logically operate upon two operands, such as an X and a Y component representing a pixel.

As a result of the complex mathematics involved in manipulating graphics images, many design techniques have been implemented by those skilled in the art in order to reduce the number of arithmetic gyrations while still providing for manipulation of images. These techniques can be carried out via software, hardware, or combinations thereof. Generally, hardware implementations are faster than software, but their flexibility is more limited.

A well known technique called "masking" has been utilized to reduce the number of requisite mathematical operations when performing image manipulations. Essentially, blocks of pixels are treated as a unit with consideration only to the edge pixels. While the inner pixels of a block are masked from consideration, the number of mathematical operations necessary to manipulate the block is severely reduced. In the art, the transfer of and manipulation of a block of pixels is oftentimes referred to as "bit boundary block transfer" (BitBlt).

Another technique is "clipping." "Clipping" refers to the process of eliminating a portion of an image. Similar to masking, blocks of pixels are treated as a unit with consideration only to edge pixels. Part of an image is clipped away from another part along an edge of pixels, thereby eliminating a portion of the image. Using this procedure, it is not necessary to perform mathematical calculations on pixel data within the area that has been removed.

Still another well known technique for reducing the number of mathematical operations necessary to perform image manipulations is "mirroring." "Mirroring" is used to symmetrically reflect an image, or parts thereof, about an axis, such as a vertical or horizontal axis. The mirroring of data is oftentimes accomplished by sending pixel data through a barrel shifter or like device.

Although the foregoing techniques have to some extent reduced the arithmetic overload associated with performing image manipulations, graphics processors with higher performance and flexibility than those in the past are still needed in. the highly competitive graphics industry where speed and efficiency are the primary driving forces.

Summary of the Invention

The present invention is a high performance, pixel modification unit for performing manipulations to bit map data in a graphics processor. The pixel modification unit comprises a logic function unit, a masking unit, and a byte mirror unit.

The logic function unit can perform logic operations on individual bits of two operands referred to as a "source" operand and a "destination" operand. The source operand may be pixel data from a bit map or fixed data, whereas the destination

operand is pixel data from a graphics bit map used by a printer, display device, or the like.

The masking unit can mask any or all bits of a destination operand so that the logic function unit does not operate on the masked bits. When masking is implemented, the output of the pixel modification unit is derived from the masked bits from the destination operand and the unmasked bits which were operated on by the logic function unit. The derivation is provided by a multiplexer unit which is controlled by the masking unit.

The byte mirror unit horizontally mirrors, or reflects, a figure in the bit map via simply reversing the bit order of bytes within pixel data retrieved from the bit map.

The present invention has many advantages. One advantage of the present invention is that bitwise logic operations can be performed on pixel data from a graphics bit map, thereby permitting extreme flexibility in regard to the types of possible logic operations that may be performed. Another advantage is that pixel data may be masked, in whole or in part, thereby allowing for elective manipulation of the bit map. Yet another advantage is that efficient mirroring of an image is provided by simple multiplexing. Still another advantage is that the present invention can be implemented in inexpensive, high performance hardware. Finally, the present invention can be integrated into an integrated circuit (IC), such as a RISC microprocessor. Undoubtedly, other features and advantages of the present invention will become more apparent to one of skill in the art upon examination of the text and the drawings associated herewith.

Brief Description of the Drawings

The present invention, as defined in the claims, can be better understood with reference to the following drawings.

FIGURE 1 illustrates a block diagram of the pixel modification unit in accordance with the present invention; and FIGURE 2 illustrates a low-level block diagram of the byte mirror unit shown in FIGURE 1.

Detailed Description of the Preferred Embodiment

The architecture of the pixel modification unit 100 in accordance with the present invention is illustrated in FIGURE 1. The pixel modification unit 100 can be implemented in a graphics processor to modify pixel data contained within a graphics bit map 101 (also known in the art as a destination bit map) corresponding to an image to be printed or displayed on a display device. Generally, the pixel modification unit 100 receives various input operands 102-112, which includes a pixel data from graphics bit map 101, performs mathematical manipulations on

these operands, and then provides an output 114, which is pixel data stored back in the graphics bit map 101.

In accordance with the present invention, the pixel data in the graphics bit map may be modified by masking the destination operand 104, byte mirroring of a mirror operand 106, and bitwise logic operations between a source operand 102 and a destination operand 104. In the context of this document, the "mirror" operand 106 and "destination" operand 104 are pixel data from the graphics bit map 101 corresponding to a printer, display device, or the like. On the other hand, the "source" operand 102 is a pixel data from a bit ^\' map or fixed data which can be dynamically programmed, for example, by controlling software.

With reference to FIGURE 1, the pixel modification unit 100 comprises a logic function unit (LFU) 116, a byte mirror unit 120, a masking unit 122, and a multiplexer (MUX/LATCH) 124.

In the preferred embodiment, the logic function unit 116 latches a 32-bit source (SRC) operand 102 and a 32-bit destination (DST) operand 104. The byte mirror unit 120 latches a 32-bit mirror (MIR) operand 106, which is essentially a destination operand to be horizontally mirrored, or reflected. The masking unit 122 latches a 32-bit mask (MSK) operand 108, a 5-bit right edge mask (REM) operand 110, and a 5-bit left edge mask (LEM) operand 112. The interrelation of the foregoing mask operands will be discussed in fiirther detail below. The multiplexer 124 selects and latches the outputs of the logic function unit (LEU) 116, the byte mirror unit 120, or the masking unit 122 so as to provide the 32-bit output 114.

The logic function unit 116 can perform any of 16 industry standard logic functions in a bitwise fashion between the source operand 102 and the destination operand 104. The logic operation performed by the logic function unit 116 is determined by the dynamically programmable 4-bit control input FX[3:0] 118. The logic function unit 116 decodes the control input FX[3:0] 118 as indicated in Table A hereafter.

The masking unit 122 comprises a logic invertor 126, a right mask generator 128, a left mask generator 130, a combiner 132, which is merely an OR logic function in the preferred embodiment. The logic invertor 126 inverts the bits of the mask operand 108 and is merely a design specific detail in the preferred embodiment. The invertor 126 is used to set the polarity of the mask data which in turn allows the pixels to be modified, but need not be implemented in order to accomplish the features of the present invention. Moreover, the right and left mask generators 128, 130 decode the REM operand 110 and the LEM operand 112, respectively, in order to mask the destination operand 104. In other words, these operands are used to determine which bits will be unchanged by the logic function unit 116. The outputs from the right and left mask generators 128, 130 in response to the respective values of the REM and LEM operands 110, 112 are shown below in respective Tables B and C.

As indicated in FIGURE 1, the outputs from the right and left mask generators 128, 130 are combined with the inversion of the mask operand 108 by the combiner 132. The outcome of this combining function, denoted by reference numeral 128, determines whether original bits 132 of the destination operand 104, or alternatively, modified bits 130 of the destination operand 104 are passed through the multiplexer 124 to the output 114.

For further clarification of bitwise operations in accordance with the present invention, consider the following example. Consider the scenario when all bits of the destination operand 104 are to be modified. In such case, the output 114 will be the result of LFU operation on all 32-bits of the original destination operand 104. The bits comprising the output 114 are outputted from LFU 116 as indicated by reference arrow 130. In order to accomplish the desired effect, all bits 128 from the masking unit 122 must be at a logic low (M=0). A possible combination of masking operands 108, 110, 112 would be as follows: MSK[31:0]=11 ... Ill, REM[4:0]=11111 and LEM[4:0]=00000.

As another example, consider the case when only the bits 3-27 of the destination operand 104 wish to be modified. A possible combination of mask operands 108, 110, 112 which could achieve this result is as follows: MSK[31:0]=0000111 ... 1000, REM[4:0]=11111, and LEM[4:0]=00000. Another possible combination resulting in the same functionality would be as follows: MSK[31:0]=1111 ... 1111, REM[4.0]=11011, and LEM[4.0]=00011. Hence, it is apparent that many combinations of the mask operands 108, 110, 112 can result in the same ultimate masking operation.

The horizontal mirroring of images, or parts thereof, is another important feature of the present invention. The byte mirror unit 120 reverses the bit order of each byte (4 bytes = 1 word) within each mirror operand 106, which is essentially a data word having 4 data bytes. The mirrored word is sent to the multiplexer 124, as indicated by a reference arrow 134.

A low level block diagram of the byte mirror unit 120 is illustrated in FIGURE 2. In accordance with the preferred embodiment, byte mirroring involves simply crossing logic paths or wires. Consequently, it is easy to implement and is reliable. Byte mirroring is sufficient added support for horizontal mirroring of bit

map mages n mos ns ances ecause eren a a s zes, suc as an y es, can be mirrored on a byte basis, and bytes can be swapped with other conventionally available hardware.

Referring to FIGURE 2, a 32-bit word input MIR[31:0] 106 comprising four data bytes 204, 206, 208, 210 is operated upon by the byte mirror unit 120 so as to reverse the order of bits within each byte, as collectively indicated by a reference numeral 212. For example, the byte located in the most significant position of the word input 106, denoted by reference 204, is transformed into a byte 214 which still resides in the most significant position of the word input 106, but has been transposed to reverse bit order.

Referring again to FIGURE 1, the multiplexer 124 can output any of the following: the mirror operand 106, the mask operand 108, the REM operand 110, the LEM operand 112, or the modified destination operand (LFU output) 130. The multiplexer 124 is controlled by the output 128 of the masking unit 122 and also by a dynamically programmable select register 126. The select register 126 is decoded into read enables for the multiplexer 124.

Although the preferred embodiment of the present invention has been described in detail above, those skilled in the art will readily appreciate the many additional modifications and applications that are possible without materially departing from the novel teachings of the present invention. For example, in the preferred embodiment, only one bit in the bit map 101 corresponds to a pixel, because the pixel modification unit 100 is envisioned for a black/white printer. However, the principles described are equally applicable to grey scale or color printer systems as well as video screen systems. Accordingly, all such modifications and applications are intended to be included within the scope of the present invention as defined within the following claims.