Field

The present invention relates to a power factor correction device and more particularly the invention relates to an active front end power factor correction and regeneration device.

Background

With the ever increasing desire to improve the efficiency of electric power conversion equipment, every aspect of this process needs to be scrutinised. Conventional electric induction motors are said to consume approximately 70% of all the electricity used in industry and about 45% of all the electricity used globally.

The use of an active power factor correction and regeneration front end, which may be applied to a motor drive for example, allows manipulation of applied voltages and currents that flow in or out of the utility connection.

Prior Art

Conventional motor drives do not incorporate a so-called active front end. At best conventional motors have additional line reactors to minimise high currents associated with a conventional rectification system of diodes and electrolytic capacitors.

The use of inverters to drive motors world-wide and in particular in industry, means that there is a potential connection between the utility and a piece of control circuit which tends to be a sophisticated electronic device at every point where an induction motor is used.

Having regard to the fact that around 70% of all the electricity used in industry is for the operation of electric motors, and the fact that most motor drives would only be running at say 50% of their maximum rating, indicate that there could be an installed base of multifunction drives capable of enormous storage and conversion to support electrical supply companies. If each of these drives had a reasonable capability of direct current (DC) power storage, taken together they could provide vast amounts of electricity required for short durations. The advantages to supply companies of this nature and capacity, which would only require the addition of local batteries and control connectivity to a motor drive that incorporates an active front end, is an interesting proposition. Such a solution also offers a major advantage in that load balancing is distributed and sited in the exact place where required.

However, in such distributed energy storage system there is a need for a high efficiency circuit to perform this function.

EP 2942866 (Rockwell) teaches a drive power conversion system with a rectifier and a switching inverter. The switching devices of the rectifier, the inverter and/or of a DC/DC converter are silicon carbide switches, such as silicon carbide MOSFETs. Driver circuits are provided for providing bipolar gate drive signals to the silicon carbide MOSFETs.

EP 2237402 (Daikin) discloses an inverter circuit that is configured to perform synchronous rectification using six switching elements. The switching element is formed from a unipolar device (SiC MOSFET) using a wideband gap semiconductor.

EP 2043241 (Rockwell) describes a switching rectifier and switching inverter on a motor drive unit that are modulated to indirectly change the magnitude of current and voltage stored in DC link by controlling the magnetic field of the motor to correct for both power factor lead and power factor lag over a wide range of motor speeds and conditions while maintaining a predetermined motor operating point.

US 2012/0081058 (Bortolous) teaches a motor drive and switch driver power system in which high frequency AC current is provided through one or more cables magnetically coupled to a local driver current transformers. The transformer secondary currents are converted to provide DC power to switch drivers of an active power converter stage in the motor drive.

CN 204376731 (Huang) discloses a four-quadrant frequency converter including an input reactor, an intelligent power module, an electrolytic capacitor and an output reactor. The power input end is connected with the input reactor which is connected to the intelligent power module. The intelligent power module is connected to a motor through the output reactor. The intelligent power module includes a rectification unit and an inversion unit. The electrolytic capacitor is arranged between the rectification unit and the inversion unit. Each of the rectification unit and the inversion unit includes six IGBTs, pairs of which IGBTs are serially connected and then are parallel connected to each other. Input power factors can be adjusted to eliminate unwanted harmonics. Energy generated by the feedback of the motor can be fed back to a grid thereby reducing waste.

An object of the invention is to improve front end connection between a utility (supply) connection and the motor drive circuitry that allows for power factor correction.

Another object of the invention is to allow variance of current crest factor and modification of an applied waveform.

Another object of the invention is to permit power regeneration and to provide a system that can cope with 'brown out' and 'black out' operation, as well as reconnection of a motor to a supply in the event of cut-out following supply 'brown outs' and 'black outs'.

A further object of the invention is to enable and improve energy storage capabilities, load shedding, load levelling, peak shaving, implementation of uninterrupted power supplies (UPS) for continued motor operation, integration of grid tie inverter and so- called G59 and G83 operation.

A yet further object of the invention is to isolate a building, dwelling, office or factory so that it can run wholly independent of grid (off grid mode) and to enable it to operate with an additional power input facility, such as for example a solar panel and/or wind generator.

Summary of invention

According to a first aspect of the invention there is provided a power factor correction system for correcting a power factor of at least one phase of an alternating current (AC) powered system, the system comprises: a variable voltage means that is connected to a frequency controller whose frequency is adapted to output a modified output signal; a control means varies an input current waveform to the variable voltage means so that the variable voltage means provides a user selectable input voltage to the frequency controller; the control means measures a voltage of an input AC current waveform and varies an input impedance, so that the impedance is selected in order to determine the amount of power factor correction and an instant when to apply the power factor correction to the input AC current waveform.

A phase locked loop (PLL) may be included as part of the control system.

Ideally the input impedance is determined by the impedance of the variable voltage means.

Preferably the power factor correction system is adapted to modify at least one phase of a multi-phase supply in order to prevent cumulative effects of harmonic currents, thereby avoiding build-up of so-called triplens.

Preferably the power factor correction system applies power factor correction when an instantaneous input voltage is higher than the user selected input voltage to the frequency controller.

Optionally the system includes: an energy storage device, such as a mechanical device or an array of batteries, for temporary energy storage. An advantage of this is that it enables the system to continue operating even when no power is being extracted or derive from a load.

As energy is removed from a lagging part of wave by the device, rather than from a portion of the leading edge of a wave (which is what is done conventionally), this reduces the impact that large numbers of devices might have upon electricity supply systems so that utility companies are better able to manage demand and improve efficiency at times of peak loads.

In order to provide an active front end to a motor drive it is necessary to have a means of achieving a desired power factor, crest factor and conversion efficiency. The present invention operates in a reverse mode for very little extra in terms of components and control. However this reverse mode of operation enables these other functions to be implemented for a relatively low incremental cost over an active front end drive.

Furthermore it is not necessary for the drive to be operating the motor itself for the active front end to be fully operational. Preferred embodiments of the invention will now be described with reference to the Figures in which:

Brief Description of the Drawings

Figure 1 illustrates a block diagram of a quasi-sine resonant drive;

Figure 2 illustrates a more detailed circuitry of power components of the quasi- resonant drive of Figure 1 ;

Figure 3 shows a block diagram of a quasi-sine motor drive;

Figure 4A shows an under-energised resonant waveform and block diagram of inputs required to enable oscillation.

Figure 4B is an overall diagrammatical representation showing a sequence of events that enables oscillation to occur;

Figures 5A to 5H show portions of a circuit diagram of a self-adjusting control circuit;

Figure 6 illustrates current excursions for operation of a control circuit that allows net current in or out of drive connections of a driven circuit;

Figure 7 is a table showing current and efficiency values for different output loads;

Figure 8A shows a diagram indicating optimum loss with respect to slip of induction motor;

Figure 8B shows a diagram indicating optimum loss with respect to advance angle for a permanent magnet (PM) or switched or variable reluctance (SVR) motor;

Figure 9 is a diagram showing drive configured as a simulated inductor;

Figure 10 is a diagrammatical overall view of a whole motor system including: a drive module, a power drive system; and a motor system;

Figure 1 1 A shows an example of a conventional pulse width modulated (PWM) motor drive circuit;

Figure 1 1 B shows an additional switch to minimise input current surge in the motor drive circuit of Figure 1 1 A; Figures 12A and 12B illustrate current waveforms that occur with the drive input circuit shown in Figure 1 1 A;

Figure 13 shows an example of a PWM drive with line reactors;

Figure 14 shows an example of a current waveform from the PWM drive with line reactors shown in Figure 13;

Figure 15 shows in block diagram form, an example of a resonant voltage conversion circuit;

Figure 16 shows in block diagram form, an example of a resonant frequency conversion circuit;

Figure 17 shows in block diagram form, an example of a split function voltage control/frequency control quasi sine motor drive;

Figure 18 shows examples of graphs of power factor and crest control with split function drive for the circuit of Figure 17;

Figure 19 is an example of a three phase bi-directional (AC to DC or DC to AC) power supply;

Figure 20 shows an example of a functional diagram of a system including the motor drive of Figure 17 and the supply circuit of Figure 19;

Figure 21 is a graph showing ranges of power factor and crest control obtained using the system in Figure 20;

Figures 22A to 22E are functional diagrams showing alternative system capabilities, handling energy flows, operating in different modes;

Figure 23 is a circuit for limiting in-rush current at phase input;

Figures 24A and 24B are examples of alternative circuits for limiting in-rush current between an active front end and a DC connection; and

Figure 25 shows load dump position across intermediate voltage point.

Detailed Description of the Drawings Figure 1 illustrates a block diagram of a quasi-sine resonant drive. Here it is shown that the output part of the circuit, consisting of the variable frequency stage, the slew rate capacitors and the motor itself forms a resonant circuit. In order for the system to operate correctly a self-adjusting turn on of the appropriate switch is required which occurs in this quasi sine form of output. Sensors may be shown connected to the motor giving an indication of speed. This can also give an indication of torque ripple if differentiated. Alternatively motor information can be calculated or derived from other measurable parameters. The variable voltage part of the circuit, shown at figure 1 , is typically also a resonant voltage conversion topology. By using these two techniques together, extremely high efficiencies can be obtained.

Figure 2 illustrates a more detailed circuit showing power components of a quasi- resonant drive circuit. Figure 2 shows a three phase half bridge frequency determining circuit with slew rate capacitors C6, C7 and C8 arranged in parallel with their outputs connected to the motor. The voltage amplitude of the generated waveforms at the output is determined by the variable voltage part of the circuit.

In operation, at the appropriate time determined by control circuitry (shown in Figure 1 ), one of the output drive transistors, Q3, (shown in Figure 2), is turned off quickly. The current that was flowing prior to switch off of Q3 transfers to charging or discharging slew rate capacitors C6 and C8 until the voltage across switching device Q4 becomes reverse biased, at which instant diode D4 switches to conduct. Diode Q4 may be either intrinsic or external to the now reverse biased switching device.

Control circuitry (shown in Figure 1 ), now turns on switch Q4, (shown in Figure 2) and maintains it on until it is switched off quickly. This repeats the resonant switching process. This same resonant process occurs on both of the other phases of the output; or as many phases that are appropriate for the motor/generator that is being controlled (Figure 2).

The operation of output circuit, the variable frequency circuit part of Figure 2, is essentially determined by a controller (Figure 1 ) which acts to force outputs to go off at a predetermined instant. Referring to Figure 2 switches Q3 to Q8 are switched on again by detecting the instant when the voltage across a switch is at zero potential, thereby ensuring no "shoot through" currents can occur. Therefore switch on occurs with no voltage potential across a switch. This ensures that there are no transient (voltage x current x dt) losses.

This type of operation, where the devices are turned off by the waveform frequency control mechanism (Figure 1 ) and turned back on again by the natural resonance, ensures that all component values and tolerances are automatically taken into account in order to derive optimum input parameters to drive a system (motor), for every switching transition that occurs. Further, in one embodiment, this can be achieved without the need for a microprocessor type hardware or software burden.

The variable voltage element, shown in Figure 2 of the circuit, includes switches Q1 and Q2 and associated other components which are also operated in a resonant mode. As configured the variable Voltage circuit provides a voltage step down function from the supply across C1 .

Figure 3 shows a block diagram of a quasi-sine motor drive. This shows the position of a self-adjusting switching device driver described as a self-triggering turn On' circuit. In Figure 3 there are 3 motor phases so there are 6 switching devices shown as 1 to 6. It is possible to drive switching devices 1 to 6 directly on and off by calculating switching criteria. However the self-triggering drive circuit described inherently compensates for turn on timing for each switching event and thereby automatically takes into account variables that would make a calculation based decision too complicated and therefore too time consuming to perform. These variables include: coil, motor, shunt/resonance capacitor, speed, load, voltage, current, temperature or any combination thereof.

Where the individual switching device is shown, there may in fact be several devices in parallel. Under these conditions it may be possible to have (within the switching device drive circuit) one part that detects the instant to switch on the devices and one or more driver circuits, for example one driver circuit for each switch in a parallel arrangement. Furthermore some of the drive circuits need to be floating while others have a common connection and so in some configurations it may be possible to employ circuit redundancy and so save components, cost and weight. Also an overall control microprocessor identified as 'μ' may optionally be referenced to the low voltage common terminal connecting switches 2, 4 and 6 of the power circuitry thus eliminating a significant amount of unnecessary signal isolating components. Figure 4A and Figure 4B depict diagrammatically a sequence of events that enables oscillation to occur. When the circuit is at rest, all switching devices have their resets enabled. To start the resonant circuit it is initially required to generate pulses of a suitable duration and apply them to the appropriate switching devices while other switching devices not required for the initialising process are still held in their reset conditions. This tends to charge up inductors in the circuit with sufficient current to enable a positive voltage rail to negative rail excursion to be able to occur with the associated resonant capacitors shunted across the switching devices. At this moment the opposite switches have to be enabled so that when the original switching devices are turned off, voltage detection circuitry operates correctly by detecting a very near zero state and turn the opposite switching device on. From this point circuits (shown for example in Figures 2, Figure 5A and Figure 5B) continue to resonate. The opportunity to allow for the turn on time of the drive circuit can be allowed for by triggering its inception at a voltage point in advance so allowing for delays.

The strategy adopted is always to be turning off the appropriate devices when a target current is achieved. This is decided by the control system shown in Figure 5A and Figure 5B. The fact that devices are resonating gets it turned on again.

This method of commutation can be controlled by software. In such an embodiment there is little chance of 'shoot through' caused by uncertainty of device switching speeds and tolerances. Therefore this method of commutation eliminates all overlap and dead band timing issues that conventional switching systems suffer from.

Because of the way the resonant circuit (in Figure 4B) operates, any stray or inherent capacitance of the switching devices, motor, cable or inductors or any other components connected to node, in this case the junction of the common connection between Qt and Qb in Figure 4B that is being switched, is in parallel with an additional capacitance component required to make the circuit function correctly. A normal switching topology finds these stray and inherent capacitances to be significantly detrimental to idealised operation and so introduces a significant power loss as well as circulating currents and EMC issues. Figure 4A shows an under energised resonant waveform and block diagram of inputs required to enable oscillation. It is a requirement for correct operation of the resonant circuit shown in Figure 4B that at all times there is sufficient stored energy in the Inductance shown in Figure 4B to ensure correct rail to rail commutation. Occasional use of the soft input PL1 (refer to the self-triggering circuit shown in Figure 3) could be used to provide the soft voltage change shown as Vadd in Figure 4A.

Figure 4B shows the power stage that is controlled by the control circuit Figure SASH.

Figure 5A to Figure 5H show circuit diagrams of self-adjusting voltage control circuit. This is used in the variable voltage section as shown in Figure 2. In order to derive the desired voltage, variable volts output, from the circuit in Figure 2, the control circuit (shown in Figures 5A to 5H) compares an output voltage with the required target voltage shown in Figure 5A. From this it ensures that off pulses, applied to the two switching devices Q1 and Q2, (shown in Figure 2) in order to maintain the output voltage at a desired level. A reset circuit for a resonating circuit (of the type shown in Figure 2) may include a control circuit operative to continually reset a latch in order to force the latch to an off state, whereby the condition of an output transistor, is controlled by switching off a latch.

The circuit shown in Figure 5A and 5B is analogue but it could be converted partly or completely to a digital domain if required. The fundamental aspects of operation would be unchanged. In Figure 2, the variable voltage supply output is capable of operation from one voltage rail to the other and has a full power bandwidth of several kHz in this configuration. The full power bandwidth can be increased to many kHz. The resonant operation used has no inherent high frequency limitation. The high frequency range is limited primarily by turn off speed of the switching devices.

The switching devices have to turn off completely, within a few percent of their rise time, which is dictated by slew rate capacitance and operating current. Switch off times slower than this tend to waste power in the switching devices as they have to handle a repetitive switching loss where there is both voltage and current present for a period of time in the switching device. The resonant operation overcomes this under normal conditions, effectively by bypassing the current that is present as the device turns off, into becoming the charging or displacement current of the resonant shunt capacitors both deliberate and parasitic.

The circuit in Figure 5A to Figure 5H has several important features and functions. Controlling a resonant circuit so that it always resonates under all conditions of applied input power voltage, desired power output voltage and desired output current requires a radically different kind of control strategy. This is especially so if extremely high levels of conversion efficiency are to be achieved.

Loop gain stability under all conditions has been one of the most difficult issues to control. This is particularly so where a high full power bandwidth is required as near to critical damping as possible whilst still maintaining operation of a resonant circuit.

Assuming that the desired target voltage is presented to the circuit (in Figure 5A) as a 0 to 5 volt value with a midpoint of 2.5 volts. Knowing what the power input mean voltage value is, then the centre point of the voltage output (which is half the voltage input) can be set by adjusting an 8 bit attenuator pad U4 and U13. Any error between the attenuated output voltage and the target input voltage is developed as an error signal from the differential amplifier U10b as shown in Figure 5A. This error is developed across C6 after modification for loop gain and the response time by the variable gain elements controlled by U14 a, b and c. This error voltage is amplified by amplifier U7a which nominally sits at 2.5 volts if the input and attenuated output voltages are identical. Any deviation from this tends to cause the voltage at U7a to vary from 0 to 5.0 volts.

It is important to consider the idling state of variable voltage resonant circuit shown in Figure 2 while it is running at a particular voltage output but where no net current is being drawn from its output terminal. The control circuit in Figure 5A and b gives an output voltage that is exactly equivalent to the current flowing in the coils of the output inductor L2a,b in Figure 2. The circuit shown in Figure 5G is discussed in greater detail below. Under these conditions the timing of the off pulses to the switching devices Q1 and Q2 is arranged so that the current in the inductor builds up to a certain positive level at which point outputs from circuit U3a and b in Figure 5H toggle and coil current drops to zero and then increases to an equal and opposite value to the current on the previous half cycle. At the corresponding negative point the outputs of U3 a and b again toggle and the coil current in L2a,b in Figure 2 becomes less negative, crosses zero and increases to its original positive value again. This cycle then repeats. Any minor errors in currents and timing result in the variable volts output voltage drifting up or down and the voltage discrepancy causes the off times of each switching device Q1 and Q2 to be altered slightly. This tends to force the variable volts output voltage to its correct value. This continual oscillation and shuttling of current back and forth has sometimes been considered wasteful but the inherent losses are so small in this kind of resonant topology. Even with relatively small output powers, in relation to full power capability, the overall efficiency is extremely high. The offset circuit comprises two comparators U3a and U3b in Figure 5H which compare two adjustable voltages so that when power is required, a feedback controller U7a offsets the voltages by a predetermined amount in order to derive more/less power which is proportional to the offset.

Because of the unusual topology and the control strategy adopted the variable volts output circuit shown in Figure 2 operates in all four quadrants. In the circuit in Figures 5A and 5B, a careful analysis of the voltage outputs of U5a and b, U7a and b, and the networks on pins 2, 3, 5 and 6 on comparators U3a and U3b identify that the outputs 1 and 7 of U3 provide the correct off pulses when required.

The configuration in Figure 5A and b also allows for normal operation where output voltage is 50% or higher and the current flows into the output terminal.

Figure 6 shows the coil L2a,b current excursions for operation of the control circuit Figure 5A and 5B for allowing net current in or out of variable voltage output connections in Figure 2. When the variable voltage circuit in Figure 2 is in its resonant idling mode, the current flowing into and out of resonant inductor L2a,b is equal and opposite, thus giving no net current flow either into or out of the variable volts output terminal. As current is drawn from the variable volts output terminal, the output voltage tends to fall and feedback circuit U10b, U7a and associated components acts to offset the switching points at turn off for comparators U3a and U3b. In turn these results in a higher value of positive current, and a lower value of negative current, flowing thus giving the desired net current outflow. Initially the control circuit in Figure 5A and 5B, attempts to maintain the same overall switching frequency, typically up to the point that the coil current doubles in the positive direction and drops to zero on the negative phase of the cycle.

If more current is required then the positive current increases to its maximum of, say 4 times peak idle current, while still maintaining its minimum current at zero. Consequently when more power is required it is necessary to reduce the input frequency of this system. This is helpful as the coil losses increase due to the higher currents but are reduced due to the lower frequency of operation.

As the circuit operates in all four quadrants, for full current in the negative direction the triangular wave is displaced below the zero current line.

Figure 7 shows the current and efficiency calculations for the level of loading on an output. Figure 7 shows how this unusual effect of efficiency versus loading characteristics that this resonant topology achieves. This efficiency is aided by altering the internal current ramp offset and the frequency change under load to achieve the efficiency range.

Figures 8A and 8B show graphs resulting from calculations relating to losses and operational voltages in order to highlight the operation of seeking the sweet spot of optimum voltages, frequencies and phasing in order to derive a user specified shaft power from motor shown in Figure 1 for the least power drawn from the supply shown as input in Figure 1 .

Figure 8A is a typical sweet spot graph for an induction motor where voltage, frequency and slip are plotted against total motor system loss for a given motor speed and load. Figure 8A shows clearly there is a particular combination of reduced volts, increased frequency and hence increased slip giving an optimisation opportunity.

Figure 8B is a typical sweet spot graph for a permanent magnet motor or variable reluctance motor where voltage and advance angle are plotted against total motor system loss for a given motor speed and load. Figure 8B shows clearly there is a particular combination of reduced volts and increased advance angle so as to provide optimised input drive criteria. Figure 9 shows a feedback approach for a drive using a simulated inductor, which in combination with the slew rate determining capacitors, forms a low pass filter so as to reduce harmonic currents and torque ripple. This kind of approach has advantages in not requiring any significant software or hardware burden to turn the quasi sine wave form into a near sinewave at all frequencies. The slew rate capacitors C4 and C5 in Figure 2 are chosen to provide an acceptable level of dV/dt which may not be enough to convert the quasi sine to a good sine wave approximation. This is where configuring the output impedance to appear like an inductor has a very important function as the actual inductance value can be made very large at low speeds and frequencies so that the low pass corner point of this LC combination is matched to the speed. This allows a relatively small capacitance to be used to provide correct quasi sine to sine modification over the whole operating speed and frequency range of the motor drive.

Figure 10 In order to understand how a motor drive system is considered, convention has arranged boundaries for the motor in context with the power connection to supply the power for it. Figure 10 shows the boundaries of a complete drive module (CDM), a power drive system (PDS) and a motor system comprising the motor itself and the attached mechanical load. This is included as a requirement of "CE Marking and Technical Standardisation Guidelines" for application to electrical power drive systems. The relevance here is that the overall efficiency of the techniques described is to be read and understood in the context of the 'motor system' in this guide.

It is recognised that further development of an existing pulse width modulator (PWM) drive for motors, which already encounters and creates significant technical obstacles, results in even greater problems to be overcome in order to get it all to work correctly and these further developments may have other undesirable effects as well. In order to introduce the advantages of newer transistor materials, such as silicon carbide (SiC) and gallium nitride (GaN) switching speeds are increasing and associated switching edges are becoming sharper. This more rapid switching imposes greater constraints on design and requires drives to be more complex, mainly due to greater parasitic impedances; as well as subjecting the motor to even more aggressive waveforms than existing ones (that already cause considerable problems in motor design and installation) as a consequence of EMC. By adopting a drive based on the fundamental principles outlined herein it is possible to revert to lower cost motor materials and also materials that give superior performance as they are only subjected to a fundamental frequency. Motor design is intended to ensure the motor runs on its fundamental frequency without having to compromise its design to cope with the issues of pulse width modulation. Improved design also allows the use of lower quality (and therefore cheaper components) and switched or variable reluctance motors (which would allow for the fundamentally cheaper and physically toughest motor design that switched or variable reluctance motors offer compared to induction or permanent magnet motors) as existing torque ripple problems are overcome.

Figure 11 A shows an example of a pulse width modulated (PWM) motor drive. Figure 1 1 A illustrates the basic building blocks of a conventional PWM motor drive. This became feasible around the mid 1980s with the development of the insulated gate bipolar transistor (IGBT). This was accepted for motor control as it allowed motors to consume less power than direct on line connection, under most conditions. However the IGBT suffered from a number of negative effects which have been accepted and worked around rather than designed out of drive circuits. The motor drive in its latest form has reached a point where it is not easy to improve it in any way. However it is a simple, reliable drive that is used in great quantities worldwide.

Figure 11 B illustrates an example of a conventional PWM drive as depicted in Figure 1 1 B but with a series resistor R1 and a shunt relay contact S1 to minimise the turn on surge current that would be drawn from the supply by the DC filter capacitors as shown in Figure 1 1 A.

Figure 12 illustrates some of the problems suffered by PWM drives, specifically relating to their input current issues. Figure 12B shows the current waveform of one of the inputs, R, in Figure 11 A. Amongst the many technical problems the conventional PWM drive causes, the connection between the drive and the utility connection has suffered from several issues. These are:

1 ) Turn on or connection current surge;

2) Phase current wave shape;

3) Power factor; 4) Crest factor;

5) Neutral harmonics;

6) Brown out or black out reconnection and ride through;

7) Rectifier voltage drop and consequent power loss;

8) Reduced DC output does not allow for generation of sufficiently high voltages to get full power from motor; and

9) There is no opportunity to regenerate from a motor under braking.

Figure 14 shows an example of a conventional PWM drive with line reactors. This shows the incorporation of a line reactor to smooth the input current in each of the input connections between the utility connection L1 , L2 and L3 and the motor drive, comprising AC to DC converter, filter and DC to AC inverter, which provides a measure of improvement to the current wave shape. This can be seen in Figure 14 and this can be compared to the current waveform in Figure 12B.

The introduction of line reactors effectively means that the 'double humped' peak current waveform, as shown in Figure 12B, is spread out in time, as shown in Figure 14. This has the effect of reducing the peak current as the period over which the current is drawn from the supply is increased.

However, the introduction of additional circuit inductance, 'the line reactor', introduces a phase delay in the current relation to the applied voltage. Also the extra component, the line reactor, introduces extra losses, takes up physical space and adds to the cost of a motor drive system.

1 ) Phase current wave shape;

2) Power factor;

3) Crest;

4) Neutral harmonics;

5) Extra physical component;

6) Extra cost over basic PWM drive cost; 7) Extra resistance and therefore system power losses; and

8) Inductive lag effects.

Figure 14 shows another example of a conventional PWM drive with line reactors which reduce but does not eliminate input current wave-shape problems.

Figure 15 shows an example of a high efficiency resonant converter device configured for voltage conversion.

The diagrams in Figure 15 show a high efficiency resonant converter circuit and its main power conversion components. In addition to components shown it is understood that an electronic drive circuit, as well as control and auxiliary power components are required to enable the circuit to operate. Due to the symmetrical nature of the circuit (Figure 15) it can be operated in all four quadrants if required. It is appreciated that the circuit can operate in four main modes.

Step down

Here the DC voltage is applied between D and C where D is the more positive terminal. The operation of the switching devices, depicted as NPN transistors, in a resonant mode allows a voltage between zero and the voltage applied at D to be available at terminal A.

Step up

Here the DC voltage is applied between A and C, where A is the more positive terminal. The operation of the switching devices, depicted as NPN transistors, in a resonant mode allow a voltage between the voltage applied at A and a voltage higher than A depending on the operating regime of the resonant circuit to be available at terminal D.

DC to AC conversion

Here the DC voltage is applied between D and C where D is the more positive terminal. If the load connected to A has its other connection connected to the midpoint of the voltage between C and D, then the operation of the switching devices, depicted as NPN transistors, in a resonant mode allows the voltage at A to be taken above or below the midpoint voltage and this impresses an AC waveform on this load with a maximum amplitude swing between zero and the voltage applied at D.

AC to DC conversion

Here the AC voltage is applied between A and returned to a point between C and a value that is equal to the peak to peak value of the AC signal present on A, where A is always the more positive terminal relative to C. The load is connected between C and D. The operation of the switching devices, depicted as NPN transistors, in a resonant mode allows the voltage at A to be taken above or below the midpoint voltage and this is converted to a DC voltage between C and D.

Figure 16 shows an example of a resonant frequency conversion block. This is a block diagram of a standard resonant frequency conversion block and shows its main power conversion components, including the resonant dV/dt limiting capacitors and a 3-phase motor connected. It is appreciated that ancillary electronic drive circuit, control and auxiliary power components required to make the circuit operate correctly are not depicted. Due to the symmetrical nature the circuit shown in Figure 16 can be operated in all four quadrants if required.

Figure 17 shows a split function voltage control/frequency control circuit for a quasi- sine motor drive. The block diagram is of a complete high efficiency resonant conversion quasi sine drive. Combined voltage control and frequency control can be achieved with a conversion efficiency in the region of around 99%. The 3 phase rectifiers, depicted as diodes in Figure 17, introduce diode drop losses of approximately 1 .4 volts at the operating current of the drive. In percentage terms this represents a loss of around 0.3%. For a single phase drive, this is closer to 0.6%. These drive losses are comparable with PWM drive losses where the output stage is hard switching at about 4 to 8 kHz directly into the motor.

Figure 18 shows a graph of different power factors and crest control with a split function drive. Referring to Figure 17 using a normal 3 phase supply (not shown) connected to 6 rectifiers and looking at the rectified waveform between C and D, there is a 120 degree window on each ½ cycle for conduction as shown in Figure 18 as Ν/φχ. As the variable voltage drive output A to C (Figure 17) is set at a level that ensures correct motor torque, at a given motor speed, (in conjunction with the optimum setting of the variable frequency controller) it is usual for there to be continuous electrical connectivity possible to each of the 120 degrees for current conduction. By ensuring this is the case the current waveform is able to be 'tailored' to adopt the most suitable current at each instant during the cycle thereby optimising the utility power factor, crest factor and associated harmonics.

Figure 19 shows a block diagram of an active front end driver. This takes the place of the 6 diode rectifiers shown in Figure 17. The block diagram in Figure 19 shows how three voltage control blocks are used so as to provide a versatile active front end power conversion system. In this example, a three phase AC to DC conversion is detailed so at least one of the three phases is always positive at any given time and likewise one of the three phases is always negative. During a full mains cycle there are periods where two of the three phases are positive and likewise there are times when two of the three phases are negative. The topology in AC to DC mode, is a composite of synchronous rectification and boost voltage conversion. The circuit in Figure 19 also ensures that the current drawn from the three phase connection L1 , L2 and L3 is power factor corrected, has a low crest factor and is supportive of the voltage waveform. In its DC to AC mode the circuit is also capable of full four quadrant operation.

Figure 20 shows Figure 19 with an active front end. Referring to Figure 20 it shows how a multi-function motor drive is configured. A DC connection point marked +ve and 0 between the active front end and the voltage control, allows a point of connection that provides a relatively stable and predictable voltage. The active front end in Figure 20 boosts an incoming mains supply connected to the inputs of the active front end to this voltage level. The voltage controller in Figure 20 can operate from zero volts to Vmax so as to isolate the motor from the voltage present at the DC link connection point. The voltage controller in Figure 20 is adapted to reduce the voltage for normal motor operation. It will also operate with current flow in the opposite direction and under these conditions it can also boost the motor output voltage under braking to regenerate kinetic energy from the motor to electrical energy if required. This is then available at the DC power input / output connection for storage or as power for other motors that may share this connection point. It can be seen that the incorporation of the active front end in Figure 20 converts the motor drive, the combination of active front end, voltage control and frequency control into an energy management mechanism. The active front end, Figure 19, is also suitable for use with a conventional PWM drive. In fact use of the active front end, Figure 19, with a PWM drive as shown in Figure 1 1 B where the six rectifiers are replaced with the active front end, is particularly beneficial as the active front end, Figure 19, can be used in place of line reactors (in Figure 13) which have to be present for a conventional PWM motor drive installation.

In a practical application, the line power may be connected directly to the active front end, Figure 19, and in which case the DC output shown in Figure 19 is connected to the PWM motor drive as shown in figure 1 1 B at its external DC link connection which is directly connected to either end of the DC link capacitor in Figure 1 1 B.

The active front end also can be used to isolate the three phase supply from the DC connection point so that the integrity of the DC supply to the connection point can be maintained during power outage or disconnect conditions of a mains supply.

Figure 21 shows diagrammatically a range of power factor and crest control techniques using an active front end and a split function drive. Because there is a combination of synchronous rectification (active rectification) and step up conversion on each of the three phase inputs, it is possible to perform power factor correction over the full 360 degrees of the waveform. A conventional diode rectifier (not shown) and line reactor (not shown) each only has access to 240 degrees of the waveform at best. This is represented as the current draw window and allows the possibility of an idealised current waveform to be drawn during the whole of the voltage waveform. The stabilised DC output voltage is just above the peak of the ripple of a theoretical voltage ripple waveform that could be achieved by using a conventional full wave rectification of the three phase input.

Figure 22 shows diagrammatically front end current paths under different modes. Figure 22 shows the way that the active front end, in conjunction with some energy storage capability and the motor drive, can perform several functions. Some of the functions can occur at the same time. The size of the energy storage device (not shown) can be adjusted to suit the functions required. An indication of how energy is transferred to/from the unit, as shown in Figure 20, is detailed in Figure 22. Figure 23 shows a circuit diagram for limiting inrush current at phase input of active front end shown in Figure 19. The circuit in Figure 19 could be the circuit as shown in Figure 15 for example. This conducts current in one direction even if the switching devices, shown as NPN transistors in Figure 15, are off. This is because of the parallel diodes placed across the switching devices in the circuit, which behave either as part of the substrate construction (in the case of a MOSFET) or are added in parallel with the switches, shown as NPN transistors, (in the case of IGBTs).

To avoid inrush current at the instant of connection or reconnection of a supply voltage to input 01 at an active front end of the circuit, it is necessary to incorporate some extra means to eliminate, or at least significantly reduce, the inrush current.

Here an extra switching device is put in series with the line input terminal shown as 01 . This extra switching device is connected in the opposite polarity and sense to the existing components in the active front part of the circuit, so if this switching device is turned off, no current can flow into the input of the active front end of the circuit in Figure 23. However it can perform another function in this position. Careful analysis shows that if the switch transistor at the top right of Figure 23 is permanently on and the switch transistor at the bottom right of Figure 23 is permanently off, this topology operates in a similar manner to a boost converter (using the extra diode in parallel with the extra switching device connected to 01 ) so that power and voltage can be increased in a controllable manner on DC side. Once the DC output is at the peak level of the AC input, the extra switching device connected to 01 can be switched on permanently and the active front end is able to operate in its usual step up (boost) mode.

Figure 24 shows examples of current inrush limited circuitry added at the junction of the +ve connection, shown in Figure 20, between the active front end and DC link. To avoid inrush current at the instant of connection (or reconnection) of the supply voltage to the inputs of the active front end, it is necessary to incorporate some additional means to eliminate, or at least significantly reduce, the inrush current. The circuits (Figures 24A and 24B) behave in very different manner to each other. Figure 24A works very similarly to the switch circuit connected to 01 in Figure 23.

However 3 of these switch circuits, one per phase, (it is possible to just use 2 switch circuits for economy purposes) are required to prevent inrush current in Figure 20 for example but because in Figure 24 the extra circuitry is on the DC side of the 3 phase active front end only one extra switching circuit is required. This extra switching circuit in conjunction with the characteristics of the 3 phase active front end ensures complete isolation of current flow under all voltage conditions.

In Figure 24A the current limiting means is placed between the output of the active Front ends and the DC link connection. Figure 24A shows a modified Buck converter that provides good control of the amount of energy that can be transferred from the active front ends to the DC link. This feature of the invention is very important as it allows reconnection and continuation during 'brown out' and blackout conditions without nuisance tripping and therefore offers significant benefits in areas where surety of supply is not always guaranteed.

Figure 24B shows an example of using a conventional resistor and relay to protect against inrush current. A disadvantage with this arrangement is that the resistance value is high in order to limit current inrush when the DC link is at a zero to low voltage at the point of application of the utility to the three phase inputs. This value is too high to allow for normal motor operation so a state exists where the motor has to be disconnected until the DC link has been established at the correct voltage. Also the resistance is present when the voltages are higher on the three phase input side than the voltage present on the DC link even when the switching devices in the 3 phase active front end are off.

Aspects of the invention have been described by way of a number of exemplary embodiments, each exhibiting different advantageous features or benefits; and it is understood that features, components or circuits from two or more of the aforementioned embodiments may be combined together to overcome specific problems or to provide a bespoke solution to a particular problem.

Figure 25 shows load dump position across intermediate voltage point, showing the position of the load dump between the variable voltage block and the variable frequency block. This allows the load dump to operate at an intermediate voltage between zero and the supply input voltage.

In a typical PWM drive (see Figure 1 1 A) the regenerated power appears as an increase in voltage above the supplied input voltage. Thus all the components have to be of a higher voltage rating as a consequence of that. However, the circuit arrangement of Figure 25 allows this regeneration and load dumping to be done at an intermediate voltage between zero and the supply voltage. Therefore there is not a need for voltage rating of components above what is required for normal motor operation.

Variation may be made by including an uninterrupted power supply (UPS) for continued motor operation.