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Patent Searching and Data


Title:
POWER-ON AND POWER-OFF RESIDUAL IMAGE ELIMINATION CIRCUIT, AND METHOD FOR ELIMINATING POWER-ON AND POWER-OFF RESIDUAL IMAGE
Document Type and Number:
WIPO Patent Application WO/2017/117963
Kind Code:
A1
Abstract:
Provided are a power-on and power-off residual image elimination circuit, and a method for eliminating a power-on and power-off residual image. The power-on and power-off residual image elimination circuit comprises a voltage detection module (Xao) and a common signal write-in module, wherein the voltage detection module (Xao) is used for detecting, in a start-up process, whether a working voltage (VDD) is lower than a first threshold voltage, and detecting, in a shut-down process, whether the working voltage (VDD) is lower than a second threshold voltage; and the common signal write-in module is used for writing a signal with the equal voltage to a common signal terminal (Vcom) at the same moment into a data line (Data) when the working voltage (VDD) is lower than the first threshold voltage and lower than the second threshold value.

Inventors:
GUO RUI (CN)
HE ZONGZE (CN)
MENG ZHIMING (CN)
HU WEIHAO (CN)
LIAO YANPING (CN)
Application Number:
PCT/CN2016/089925
Publication Date:
July 13, 2017
Filing Date:
July 13, 2016
Export Citation:
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Assignee:
BOE TECHNOLOGY GROUP CO LTD (CN)
BEIJING BOE DISPLAY TECH CO (CN)
International Classes:
G09G3/36
Foreign References:
CN104361866A2015-02-18
CN105185293A2015-12-23
JP2011095622A2011-05-12
US6476590B22002-11-05
CN105632435A2016-06-01
Attorney, Agent or Firm:
DRAGON INTELLECTUAL PROPERTY LAW FIRM (CN)
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