Title:
POWER SEMICONDUCTOR DEVICE HAVING WITHSTAND VOLTAGE REGION OF VLD STRUCTURE, AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2023/182822
Kind Code:
A1
Abstract:
Disclosed are a power semiconductor device having a withstand voltage region of a VLD structure, and a method for manufacturing same. The method for manufacturing a power semiconductor device comprises the steps of: deforming an oxide film formed on the top of a first conductive semiconductor substrate into an alternately thick and thin oxide film by using a LOCOS process in a withstand voltage holding region of a power semiconductor device; injecting a second conductive impurity into the semiconductor substrate from the top of the deformed oxide film toward the withstand voltage holding region by using the same concentration of the second conductive impurity and the same injection energy; and diffusing the second conductivity type impurity injected into the semiconductor substrate through the deformed oxide film, thereby forming an inclined doping region of a VLD structure.
Inventors:
KIM SOO SEONG (KR)
OH KWANG HOON (KR)
YUN CHONG MAN (KR)
OH KWANG HOON (KR)
YUN CHONG MAN (KR)
Application Number:
PCT/KR2023/003837
Publication Date:
September 28, 2023
Filing Date:
March 23, 2023
Export Citation:
Assignee:
TRINNO TECH CO LTD (KR)
International Classes:
H01L29/06; H01L29/66
Foreign References:
| KR101550675B1 | 2015-09-08 | |||
| KR100249505B1 | 2000-03-15 | |||
| JP2019012840A | 2019-01-24 | |||
| JP2003309257A | 2003-10-31 | |||
| JPH07321189A | 1995-12-08 | |||
| KR102414388B1 | 2022-06-29 |
Attorney, Agent or Firm:
HAN, Sang Chun (KR)
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