Title:
PRE-LOAD TECHNIQUES FOR IMPROVED SEQUENTIAL MEMORY ACCESS IN A MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2021/184714
Kind Code:
A1
Abstract:
Devices and techniques for improving memory access operations of a memory device are provided. In an example, a method can include loading multiple LBA-to-physical address (L2P) regions of an L2P table from memory arrays of the memory device to a mapping cache in response to determining the LBA of the memory access command is not within the L2P region including of a mapping cache. When the memory access command is a sequential command, the multiple L2P regions loaded to the mapping cache can provide improved memory access performance.
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Inventors:
DUAN XINGHUI (CN)
ZHAO BIN (CN)
HUANG JIANXIONG (CN)
ZHAO BIN (CN)
HUANG JIANXIONG (CN)
Application Number:
PCT/CN2020/116462
Publication Date:
September 23, 2021
Filing Date:
September 21, 2020
Export Citation:
Assignee:
MICRON TECHNOLOGY INC (US)
International Classes:
G06F12/02
Foreign References:
US20190155723A1 | 2019-05-23 | |||
US20170024326A1 | 2017-01-26 | |||
CN107273053A | 2017-10-20 |
Attorney, Agent or Firm:
LEE AND LI-LEAVEN IPR AGENCY LTD. (CN)
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