PRECONDITIONING INTEGRATED CIRCUIT FOR INTEGRATED CIRCUIT TESTING

WIPO Patent Application WO2003041122

A3

A test system (300) is configured to include a preconditioning integrated circuit (350) that is coupled between automatic test equipment (ATE) (310) and a device-under-test (DUT) (150). The preconditioning integrated circuit (350) is configured to precondition signals that are commmunicated to and from the device-under-test 8150), and particularly, to precondition high-frequency signals so as to avoid the adverse affects caused by long lead lines (311) between the automated test equipment (310) and the device-under-test (150). The preconditioning integrated circuit (350) is designed to provide direct contact with the device-under-test (310), thereby providing very short lead lines (351) to the device-under-test (150). High-frequency signals that are communicated to the device-under-test 8150) are generated, or reformed, at the preconditioning integrated circuit (350), based on control signals, or other test signals, from the automated test equipment (310). Highfrequency, or time-critical, signals that are received from the device-under-test (150) are processed and/or reformed by the preconditioning integrated circuit (350), for subsequent transmission to the automated test equipment (310).

RUTTEN IVO W J M

PCT/IB2002/004484

October 16, 2003

October 28, 2002

Click for automatic bibliography generation  

KONINKL PHILIPS ELECTRONICS NV (NL)

G01R31/28; H01L21/66; G01R31/319; (IPC1-7): G01R31/316; G01R1/073

WO1996017378A1

1996-06-06

US5903164A	1999-05-11
US5323107A	1994-06-21
US6057679A	2000-05-02
US20030085726A1	2003-05-08
US20030085722A1	2003-05-08

View/Download PDF      PDF Help

Previous Patent: A CURRENT BLOCKING STRUCTURE TO IMPROVE SEMICONDUCTOR LASER PERFORMANCE

Next Patent: CONTAINER BEADING