PRINTED BOARD AND DESIGNING METHOD THEREFOR AND IC PACKAGE TERMINAL DESIGNING METHOD AND CONNECTING METHOD THEREFOR

Title:

PRINTED BOARD AND DESIGNING METHOD THEREFOR AND IC PACKAGE TERMINAL DESIGNING METHOD AND CONNECTING METHOD THEREFOR

Document Type and Number:

WIPO Patent Application WO/2006/059706

Kind Code:

A1

Abstract:

A printed board capable of mounting thereon an IC package such as BGA having small inter-terminal gaps even if a conventionally-used, normal-size through hole is used. Soldering lands (2a), (2b), (2c) and (2d) to which soldering balls are connected are arranged in a lattice form on one main surface of a printed board (1). The center point (B) of a through hole (3) is provided deviated toward a soldering land (2a) kept at the same potential as the through hole (3) from the intersection (A) between a diagonal (200ab) connecting the soldering lands (2a) and (2b) and a diagonal (200cd) connecting the soldering lands (2c) and (2d).

Inventors:

WATANABE MASAKI

Application Number:

PCT/JP2005/022157

Publication Date:

June 08, 2006

Filing Date:

December 02, 2005

Export Citation:

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Assignee:

MATSUSHITA ELECTRIC IND CO LTD (JP)
WATANABE MASAKI

International Classes:

H01L21/60; H05K3/34; H05K1/11; H05K3/00; H05K3/46

Foreign References:

JP2001168511A	2001-06-22
JPH08288658A	1996-11-01
JP2003023243A	2003-01-24
JP2004281471A	2004-10-07
JP2003298220A	2003-10-17
JPH07235761A	1995-09-05
JP2000349191A	2000-12-15
JP2001168511A	2001-06-22
US20030047348A1	2003-03-13
US20030184986A1	2003-10-02
JP2003349191A
US20020084312A1	2002-07-04

Other References: