Title:
PROCESSING DEVICE WITH RESTRICTED POWER DOMAIN WAKEUP RESTORE FROM NONVOLATILE LOGIC ARRAY
Document Type and Number:
WIPO Patent Application WO/2014/040051
Kind Code:
A8
Abstract:
A processing device handles two or more operating threads. A non-volatile logic controller (1806) stores first program data from a first program in a first set of non- volatile logic element arrays (1812) and second program data from a second program in a second set of non- volatile logic element arrays (1814). The first program and the second program can correspond to distinct executing threads, and the storage can be completed in response to receiving a stimulus regarding an interrupt for the computing device apparatus or in response to a power supply quality problem for the computing device apparatus. When the device needs to switch between processing threads, the non- volatile logic controller (1806) restores the first program data or the second program data from the non- volatile logic element arrays (1810) in response to receiving a stimulus regarding whether the first program or the second program is to be executed by the computing device apparatus.
Inventors:
BARTLING STEVEN CRAIG (US)
KHANNA SUDHANSHU (US)
KHANNA SUDHANSHU (US)
Application Number:
PCT/US2013/059006
Publication Date:
October 23, 2014
Filing Date:
September 10, 2013
Export Citation:
Assignee:
TEXAS INSTRUMENTS INC (US)
TEXAS INSTRUMENTS JAPAN (JP)
TEXAS INSTRUMENTS JAPAN (JP)
International Classes:
G06F9/38; G06F1/32; G06F9/30; G06F9/46
Attorney, Agent or Firm:
FRANZ, Warren, L. et al. (P.O. Box 655474 Mail Station 399, Dallas TX, US)
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