Title:
PROCESSOR
Document Type and Number:
WIPO Patent Application WO/2010/128582
Kind Code:
A1
Abstract:
A processor is provided with instruction buffers (401-403) which store a plurality of instructions to be issued to a plurality of computing units, dependence relationship detection u its (431, 432) which detect a first dependence relationship that is a dependence relationship existing between arbitrary defined two instructions stored in the instruction buffers and a second dependence relationship that is a dependence relationship existing between the respective instructions stored in the instruction buffers and respective instructions that are already issued, and determine a group of instructions that have neither the first dependence relationship nor the second dependence relationship among the plurality of instructions stored in the instruction buffers as a group of instructions capable of being issued to the plurality of computing units, and dispatch units (441-443) which issue the instructions included in the determined group to the plurality of computing units.
Inventors:
YAMANA TOMOHIRO
Application Number:
PCT/JP2010/002939
Publication Date:
November 11, 2010
Filing Date:
April 23, 2010
Export Citation:
Assignee:
PANASONIC CORP (JP)
YAMANA TOMOHIRO
YAMANA TOMOHIRO
International Classes:
G06F9/38
Foreign References:
| JPH0926877A | 1997-01-28 | |||
| JPH05181676A | 1993-07-23 | |||
| JP2006517322A | 2006-07-20 | |||
| JP2009099097A | 2009-05-07 | |||
| JP2001092656A | 2001-04-06 |
Attorney, Agent or Firm:
NII, Hiromori (JP)
New house extensive 守 (JP)
New house extensive 守 (JP)
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