PULSE SHIFT CIRCUIT AND FREQUENCY SYNTHESIZER

Title:

PULSE SHIFT CIRCUIT AND FREQUENCY SYNTHESIZER

Document Type and Number:

WIPO Patent Application WO/2017/154532

Kind Code:

A1

Abstract:

A problem with conventional distortion pulse shift circuits is that the output timing of a pulse signal cannot be controlled unless a reset signal is used. This pulse shift circuit is provided with: an integrator which integrates an input first signal at each clock; a quantizer into which a second signal is input, and which outputs a pulse signal when the integrated value from the integrator is equal to the signal value of the second signal or exceeds the signal value of the second signal; a delay circuit which delays the pulse signal; a converter which is provided at a stage preceding or following the delay circuit and which converts the signal value of the pulse signal into the signal value of the second signal; a subtractor which subtracts the signal value of the pulse signal, converted by the converter, from the signal value of the first signal to be input into the integrator; and an input signal control circuit into which a third signal is input, which is disposed at a stage preceding the integrator, and which either adds a signal value corresponding to the third signal to the first signal to be input into the integrator, or blocks input of the first signal into the integrator for a number of clocks corresponding to the third signal.

Inventors:

NAKAMIZO HIDEYUKI (JP)
HIEDA MORISHIGE (JP)
MIZUTANI HIROYUKI (JP)
TAJIMA KENICHI (JP)

Application Number:

PCT/JP2017/006059

Publication Date:

September 14, 2017

Filing Date:

February 20, 2017

Export Citation:

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Assignee:

MITSUBISHI ELECTRIC CORP (JP)

International Classes:

H03L7/197; H03L7/23; H03M3/02

Domestic Patent References:

WO2007091516A1

2007-08-16

Foreign References:

US20150263742A1	2015-09-17
JP2014049808A	2014-03-17
JP2002314425A	2002-10-25

Other References: