Technical Field

The present invention relates to an apparatus and a method for generating pulse width modulation (PWM) signals. The present invention specifically relates to an apparatus and a method for generating PWM signals in switching regulators or power converters.

Background Art A switching regulator is a circuit that uses a power switch, an inductor, and a diode to transfer energy from input to output. In contrast to linear regulators that use a

resistive voltage drop to regulate the voltage and lose power in the form of heat a switching regulator does not have a voltage drop and an associated current but instead the current is 90 degree out of phase with the voltage. Due to this, the energy is stored and can be recovered in the discharge phase of the switching cycle. In the art several types of switching regulators exist dependent on how the switching circuit is arranged, for example step-down (buck), step-up (boost) or inverter (flyback) . The switch can be controlled by a PWM signal with duty ratio D that represents the on state during a PWM period. The output voltage is dependent on the duty ratio D and, hence, can be controlled by a controller which consists of an analog-to-digital- converter (ADC) , a discrete-time control law, and a digital PWM (DPWM) module. The ADC samples and quantizes the

regulated signal, the output voltage error that is the difference between the output voltage and an output voltage reference. The control law computes the digital duty ratio command D based on the quantized output voltage error. The control law is a given by a PID control law which is

configured by a set of PID coefficients, the set comprising the proportional gain Kp, the integral gain Ki and the differential gain Kd and the time delay Td. The digital PWM modulator takes D as input, and outputs a PWM waveform with the commanded duty ratio D at a switching frequency. The PWM waveform has finite time resolution. The sensing and the quantization of other signals such as the load can be added depending on the application and the specific control law used .

In the state of the art one set of PID coefficients is used. In case a large load transient occurs the response of the PID controller may be slow.

Disclosure of the invention

It is therefore an objective of the present invention to provide an apparatus and a method for generating PWM signals that lead to a superior response to load transients over the prior art .

The objective is achieved with the feature of the

independent claims. The dependent claims relate to further aspects of the invention.

One aspect relates to a pulse width modulation power

converter, comprising an output stage that generates an output voltage according to a pulse width modulation signal and an input voltage by means of a switching element. The PWM modulator further comprises means for providing an output voltage reference and an analog digital converter connected to the output stage and the means for providing an output voltage reference. The ADC samples and amplifies a difference between the output voltage and the output voltage reference to generate an error signal. A PID controller connected to the ADC and the switching element wherein the PID controller is configured by a set of PID coefficients determines a duty ratio for a pulse width modulator that generates the PWM signal. The PWM power converter further comprises means for detecting a steady state and a load transient. Two different sets of PID coefficients will be provided for the PID controller, a first set for the steady state and a second set in case a load transient is detected. The two sets are stored in a memory and one of them is selected by selector means.

One aspect of the present invention relates to means for detecting a steady state or a load transient. These means for detecting a steady state or a load transient comprise means for monitoring the error signal and comparing each value of the error to its predecessor by generating an error signal difference, preferably by taking into the account the second derivative of the error signal.

One aspect of the present invention relates the PWM

modulator and its triggering. A duty ratio difference of the duty ratio and its predecessor is computed and in case during an off-time of the pulse width modulation signal the duty ratio difference exceeds a threshold the pulse width modulator is triggered to start a new pulse width modulation period. Hence, the response of the modulator to an output voltage drop is superior in terms of speed since the

modulator is provided with a refreshed duty ratio before the current PWM period ends. In case the load transient is detected during the on-time of the PWM period the on-time may be simply prolonged.

One further aspect of the present invention relates to the second set of PID coefficients for the transient mode. For the proportional gain Kp a plurality of nonlinear gain coefficients are provided in a storage means. A nonlinear gain coefficient is adaptively selected dependent on the load transient.

One aspect of the present invention relates to oversampling . The pulse width modulation power converter comprises means for providing the analog-to-digital converter with a first clock frequency and the pulse width modulator with a second clock frequency, wherein the first clock frequency is higher than the second clock frequency.

One further aspect of the present invention relates to oversampling . The PWM power converter comprises a moving average filter for computing a moving average of the error signal .

The present invention further relates to a control method for a power converter wherein an output voltage is generated according to a pulse width modulation signal and an input voltage. An error signal is generated by sampling the output voltage and differencing the sampled output voltage and an output voltage reference. A duty ratio that defines a duty cycle of pulse width modulation signal is determined by means of PID controlling algorithm generating a pulse width modulation signal by providing the duty ratio to a pulse width modulator.

A steady state or a load transient is detected. A first set of PID coefficients is selected in case a steady state is detected and a second set of PID coefficients is selected in case a load transient is detected.

The step of detecting a steady state or a load transient may comprise monitoring the error signal and comparing each value of the error signal to its predecessor by computing an error signal difference, preferably taking into account the second derivative of the error signal. If the error signal difference exceeds a threshold a load transient is detected. A duty ratio difference of the duty ratio and its predecessor may be computed and in case during an off-time of the pulse width modulation signal the duty ratio

difference exceeds a threshold the pulse width modulator may be triggered to start a new pulse width modulation period.

A nonlinear gain KP may be selected in case of load

transient detection. Adapted nonlinear gains KP have the advantage that a steady is reached more quickly compared to linear gains . The output voltage signal and/or the error signal may be oversampled by sampling a plurality of error signals within one PWM period. The oversampling is necessary for the load transient detection since a plurality of duty ratio are compared to its predecessors respectively within on PWM period.

Further, a moving average of the sampled error signal is computed by a moving average filter. This leads to an interpolated error signal with support in between samples provided by the ADC. Moreover, by applying a moving average filter the ripple of the error signal is suppressed.

One further advantage of the present invention is that due to a superior response to load transients the size of the capacitors on a printed circuit board may be reduced.

Brief Description of the Drawings

The apparatus and method according to the invention are described in more detail herein below by way of exemplary embodiments and with reference to the attached drawings, in which:

Fig.l shows a block diagram of PWM buck converter;

Fig.2 shows a block diagram of a PWM signal generator;

Fig.3 shows a block diagram for non-linear KP selection

Embodiment of the invention One embodiment of the present invention is a buck converter as shown in Figure 1. The buck converter consists of a digital controller 11 and a power train 12. The digital controller comprises an ADC 13, the control law 14 and the PWM modulator 15. An error signal 16 is computed by

differencing the output reference voltage V_ref and the output voltage V_out . The control law takes the error signal 16 as input and outputs the duty command ratio 17. The duty command ratio 17 controls the PWM modulator which generates a switching frequency 18. Switching frequency 18 and input voltage V_in drive the power train which outputs the output voltage V_out .

Fig. 2 shows the digital controller 11 with a circuit 23 for computing and amplifying the error signal, the ADC 13 that quantizes the error signal, the control law implemented as PID compensator 14, the PWM modulator 15 and an additional moving average filter 21 for oversampling . Oversampling is used for detecting load transients and ripple suppression. The PID compensator 14 further comprises a unit for nonlinear KP selection. The ADC clock operates at 16 Mhz, the PID update clock at 48 Mhz and the PWM clock at 500 kHz.

For the PID compensator 14 two sets of PID coefficients are provided, one for the transient mode and one for the steady state mode. The transient mode is entered by hardware upon load step transient detection. In transient mode the PID uses the transient coefficients KP_T, KI_T, KD_T, TD_T.

Furthermore KP is adaptively selected in transient mode. The steady state mode is entered by hardware upon state

detection. In steady state the PID uses the steady state coefficients KP_S, KI_S, KD_S, TD_S .

Fig. 3 shows the unit for non-linear KP selection 22. The unit 22 comprises a storage unit 31 for storing the nonlinear KP gains and a digital compare and select unit 32 which compares the error signal with a plurality of

thresholds that define error ranges, Error Range 0 ... Error Range 4. For every Error Range 0 to 3 a non-linear KP gain KP_T, KPNL_0.NLC, KPNL_1.NLC, KPNL_2.NLC, KPNL_3.NLC is stored in unit 31. One theses KP gains is chosen by a multiplexer 34 which is controlled by the compare and select unit 32. A mode selection multiplexer 35 which is connected to the output of the multiplexer 34 selects one of the operating modes, steady state or load transient. The mode selection multiplexer 35 is controlled by the mode select signal. The mode select signal is generated by a mode detection unit.

While the present invention has been illustrated and

described in detail in the drawings and foregoing

description, such illustration and description are to be considered illustrative or exemplary and not restrictive. It will be understood that changes and modifications may be made by those of ordinary skill within the scope and spirit of the following claims Pulse Width Modulation power converter and control method

References digital controller

power train

analog-to-digital converter

control law

PWM modulator

error signal

duty command ratio

switching frequency

moving average filter

unit for non-linear KP selection

circuit for computing and amplifying the error signal unit for storing KP coefficients

digital compare and select unit

PID proportional gain

multiplexer

mode selection multiplexer

fix to integer unit

absolute value unit