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Title:
QUASI-RESONANT BRAKING LOAD
Document Type and Number:
WIPO Patent Application WO/2012/013982
Kind Code:
A2
Abstract:
A method of dissipating electrical energy, the method comprising: switching on a second switching device to cause current to flow in a load resistor under control of a first resonant network and to ensure the voltage across a first switching device is substantially zero, and switching on a first switching device when the voltage across the first switch is substantially zero to cause the current flowing in the load resistor to be maintained while switching off the second switching device; switching off the first switching device to cause the current flowing in the load resistor to reduce under control of a second resonant network. In this way, energy may be transferred from an electric motor to a braking resistor in a manner that reduces the amount of electromagnetic noise produced. In addition this invention reduces the amount of unwanted switching loss associated with the switching devices used to control the energy transfer.

Inventors:
KNILL ALEXANDER CHARLES (GB)
Application Number:
PCT/GB2011/051442
Publication Date:
February 02, 2012
Filing Date:
July 29, 2011
Export Citation:
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Assignee:
INSPIRIT ENERGY LTD (GB)
KNILL ALEXANDER CHARLES (GB)
International Classes:
B60L7/08
Domestic Patent References:
WO2005002904A12005-01-13
Foreign References:
US5117166A1992-05-26
JPS63213484A1988-09-06
Other References:
None
Attorney, Agent or Firm:
ROONEY, John-Paul (4 More London Riverside, London SE1 2AU, GB)
Download PDF:
Claims:
Claims:

1. A circuit for dissipating electrical energy, the circuit comprising:

a load resistor;

a first switching device;

a second switching device; and

first and second resonant networks arranged to control the rate of change of current flowing in the load resistor;

wherein:

the second switching device is configured to switch on to cause current to flow in the load resistor under control of the first resonant network and to ensure the voltage across the first switching device is substantially zero, and

the first switching device is configured to switch on when the voltage across the first switch is substantially zero to cause the current flowing in the load resistor to be maintained while the second switching device is switched off;

the first switching device is configured to switch off to cause the current flowing in the load resistor to reduce under control of the second resonant network.

2. The circuit of claim 1, wherein the first resonant circuit includes an inductor connected between the first and second switching devices.

3. The circuit of claim 1 or claim 2, wherein the second resonant circuit includes a capacitor connected across the load resistor.

4. The circuit of claim 3, wherein the capacitor is connected to a voltage supply via a second diode arranged to allow current to flow toward the voltage supply.

5. The circuit of claim 4, wherein the second switching device is connected to the capacitor and the second diode via a first diode arranged to allow current to flow toward the voltage supply.

6. The circuit of any preceding claim, wherein the first and second switching devices are connected to a common ground.

7. The circuit of any preceding claim, wherein the first and second switching devices are implemented using Insulated Gate Bipolar Transistors.

8. The circuit of any preceding claim, wherein the first and second switching devices are implemented using Metal Oxide Field Effect Transistors.

9. The circuit of any of claims 1 to 7, wherein one of the first and second switching devices is implemented using one or more Insulated Gate Bipolar Transistors and the other of the first and second switching devices is implemented using one or more Metal Oxide Field Effect Transistors.

10. The circuit of claim 9, wherein the first switching device is implemented using one or more Insulated Gate Bipolar Transistors and the second switching device is implemented using one or more Metal Oxide Field Effect Transistors.

11. The circuit of any preceding claim, wherein the circuit comprises a shunt diode in parallel with the load resistor and arranged to allow current to flow towards a power supply.

12. The circuit of any preceding claim, wherein the circuit comprises a shunt capacitor in parallel with one of the switching devices.

13. The circuit of claim 12, wherein the shunt capacitor is in parallel with the first switching device.

14. A method of dissipating electrical energy, the method comprising:

switching on a second switching device to cause current to flow in a load resistor under control of a first resonant network and to ensure the voltage across a first switching device is substantially zero, and

switching on a first switching device when the voltage across the first switch is substantially zero to cause the current flowing in the load resistor to be maintained while switching off the second switching device;

switching off the first switching device to cause the current flowing in the load resistor to reduce under control of a second resonant network.

15. The method of claim 14, wherein the method is used in a braking load of an electrical motor.

Description:
Quasi-resonant Braking Load

FIELD OF THE INVENTION

This invention relates to the field of electronic braking loads, particularly but not exclusively for use in dissipating the energy from an electric motor during braking.

BACKGROUND

In a conventional synchronous AC motor drive both positive and negative torque can be applied to the motor. When applying positive torque, energy is transferred from the drive to the motor where it is then converted into mechanical energy. When applying negative torque the direction of energy transfer is reversed and energy is transferred from the motor to the drive, slowing or braking the motor.

When applying negative torque the drive must include some means to dissipate the energy from the motor. In larger drives this energy is often fed back to the mains electricity supply. This is referred to as regeneration. In smaller drives the energy is more often dissipated in a braking resistor.

The braking resistor is usually connected across the drive's DC bus and in order to control the amount of power dissipated by the resistor, it is often connected in series with a switching device such as an IGBT or MOSFET. By controlling the duty cycle of the switching device the current and hence power in the resistor can be controlled. A typical arrangement is shown in Figure 1.

It can be shown that the current in the braking resistor 101 is proportional to the duty cycle of the switching device 102.

A major problem associated with this approach is the amount of electromagnetic noise radiated from the connection to the braking resistor, 101. This arises from the fast edges, typically several hundred Nanoseconds, associated with the switching of 102. This is particularly problematic for drives using an externally connected braking resistor. SUMMARY OF THE INVENTION

This invention describes a system for dissipating energy from an electric motor during braking. Unlike existing techniques this invention uses a novel quasi-resonant topology to dramatically reduce the amount of electromagnetic noise by reducing the rate of change of voltage and current during switching transitions. In addition, through the use of zero- voltage switching, unwanted dissipation in the switching devices is avoided allowing the use of smaller devices and heat sinks for a given power rating.

According to an aspect of the invention, there is provided a circuit and method as set out in the appended claims. Various modifications and optional features are set out in the dependent claims and the description which follows.

In one aspect, there is provided a circuit for dissipating electrical energy, the circuit comprising: a load resistor; a first switching device; a second switching device; and first and second resonant networks arranged to control the rate of change of current flowing in the load resistor; wherein: the second switching device is configured to switch on to cause current to flow in the load resistor under control of the first resonant network and to ensure the voltage across the first switching device becomes substantially zero, and the first switching device is configured to switch on when the voltage across the first switch is substantially zero to cause the current flowing in the load resistor to be maintained while the second switching device is switched off; and the first switching device is configured to switch off to cause the current flowing in the load resistor to reduce under control of the second resonant network.

Preferably, the first resonant circuit includes an inductor connected between the first and second switching devices.

Preferably, the second resonant circuit includes a capacitor connected across the load resistor. Preferably, the capacitor is connected to a voltage supply via a second diode arranged to allow current to flow toward the voltage supply. Preferably, the second switching device is connected to the capacitor and the second diode via a first diode arranged to allow current to flow toward the voltage supply.

Preferably, the first and second switching devices are connected to a common ground. Preferably, the first and second switching devices are implemented using Insulated Gate Bipolar Transistors.

Alternatively, the first and second switching devices are implemented using Metal Oxide Field Effect Transistors.

Preferably, one of the first and second switching devices is implemented using one or more Insulated Gate Bipolar Transistors and the other of the first and second switching devices is implemented using one or more Metal Oxide Field Effect Transistors.

Preferably, the first switching device is implemented using one or more Insulated Gate Bipolar Transistors and the second switching device is implemented using one or more Metal Oxide Field Effect Transistors.

In one embodiment, the circuit comprises a shunt diode in parallel with the load resistor and arranged to allow current to flow towards a power supply.

In one embodiment, the circuit comprises a shunt capacitor in parallel with one of the switching devices. Preferably, the shunt capacitor is in parallel with the first switching device.

In another aspect of the invention, there is provided a method of dissipating electrical energy, the method comprising: switching on a second switching device to cause current to flow in a load resistor under control of a first resonant network and to ensure the voltage across a first switching device is substantially zero, and switching on a first switching device when the voltage across the first switch is substantially zero to cause the current flowing in the load resistor to be maintained while switching off the second switching device; switching off the first switching device to cause the current flowing in the load resistor to reduce under control of a second resonant network.

Preferably, the method is for dissipating power in a braking load of an electrical motor.

There is also provided a circuit consisting of first and second switching devices, a capacitor, an inductor, and two or more diodes connected to a braking resistor in such a manner as to allow control of the power dissipated in said resistor by the variation of the on and off times of said switching devices. Preferably, both switching devices are implemented using Insulated Gate Bipolar Transistors.

Preferably, both switching devices are implemented using Metal Oxide Field Effect Transistors.

Preferably, one switching device is implemented using a Insulated Gate Bipolar Transistor and the other using a Metal Oxide Field Effect Transistor.

Preferably the circuit incorporates an additional capacitor in parallel with one of the switching devices.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which:

Figure 1 is a schematic diagram of a conventional motor drive and braking load according to the prior art;

Figure 2 is a schematic diagram of a dissipation circuit in accordance with a first example embodiment of the invention;

Figure 3 is a timing diagram showing various voltages and currents in the dissipation circuit 200 of Figure 2;

Figures 4 to 7 are each schematic diagrams equivalent to Figure 2 with directions of current flow shown for some of the various stages of operation shown in Figure 3;

Figure 8 is a schematic diagram of a dissipation circuit, or quasi-resonant braking load, in accordance with a second example embodiment of the invention;

Figure 9 is a schematic diagram of a dissipation circuit, or quasi-resonant braking load in accordance with a third example embodiment of the invention. DETAILED DESCRIPTION

A first embodiment of the invention is now described with reference to Figure 2.

Figure 2 is a schematic diagram of a dissipation circuit 200 suitable for dissipating energy from an electric motor during braking, or dissipating electrical energy from another source.

The dissipation circuit 200 comprises a ground rail 200-gnd, a DC rail 200-DC, a first switching device 201, a second switching device 202, a first diode 203, a second diode 204, a resistor 205, a capacitor 206 and an inductor 207.

The first switching device 201, or main switching device, and the second switching device 202, or auxiliary switching device, are insulated gate bipolar transistors (IGBTs). Their emitters 201 e, 202e are connected to the ground rail 200-gnd. The inductor 207 is connected between the collectors 201c, 202c of the first switching device 201 and the second switching device 202.

The resistor 205, which is the load in which energy is to be dissipated, is connected between the collector 201c of the first switching device 201 and the DC rail 200-DC.

The first diode 203 is connected at a first end to the collector 202c of the second switching device 202 and at a second end to the capacitor 206. The capacitor 206 is connected between the diode 203 and the collector 201c of the first switching device 201 and one end of the load resistor 205.

The second diode 204 is connected between the second end of the first diode 203 and the DC rail 200-DC.

The first and second switching devices 201, 202 have parasitic capacitances as would be understood in the field. In particular, the first and second switching devices 201, 202 have parasitic output capacitances. The first and second switching devices 201, 202 each also have an internal anti-parallel diode 201 d, 202d.

The capacitor 206 and inductor 207 each form resonant networks which control current in the load resistor 205 and switching times as will be described below. With reference to Figure 2, a switching cycle starts with the turn-on of switching device 202. The voltage across the resistor 205, in this example a braking resistor, increases at a rate determined by inductor 207 in conjunction with the parasitic output capacitance of switching device 201. This is a first resonant network. After a short period of time, typically several microseconds, the voltage across the braking resistor 205 rises to be equal to the full DC bus voltage and the voltage across switching device 201 falls to effectively zero. At this point switching device 201 is turned on and switching device 202 turned off. This turn-on of switching device 201 under zero voltage conditions is essentially loss-free.

The rate of rise of voltage across switching device 202 is controlled by the combination of inductor 207 and capacitor 206 and is typically of the order of a few microseconds. By deliberately slowing the rate of rise of the voltage, the turn-off loss associated with switching device 202 is dramatically reduced. The voltage across switching device 202 continues to rise until clamped by diodes 203 and 204.

At the end of the on-time portion of the switching cycle the switching device 201 is turned off. The rate of rise of voltage is controlled by capacitor 206, or second resonant network, which was charged to the full DC rail voltage during the turn-off of switching device 202. Again the slow rate of rise dramatically reduces the turn-off loss of the switching device.

The cycle described above is repeated at the desired operating frequency. The duty cycle is effectively defined by the sum of the on- time of the two switching devices 201, 202.

The switching cycle is described in more detail with reference to Figures 3 to 7.

Figure 3 is a timing diagram showing various voltages and currents in the dissipation circuit 200 of Figure 2. Figures 4 to 7 are the schematic diagram of Figure 2 with directions of current flow shown for various stages of operation.

Referring to Figure 3, the switching cycle starts with both switching devices 201 and 202 in an off state and zero current flowing in the resonant inductor 207. The voltage across capacitor 206 is assumed to be essentially zero.

Figure 4 shows current flow in the circuit from Tl to T4 of the timing diagram of Figure 3. At instant Tl the second, or auxiliary, switching device 202 is turned on by the application of a suitable gate drive voltage and the collector voltage of the auxiliary switching device

202 collapses rapidly to zero. Since the auxiliary switching device 202 is switching under zero current conditions, turn-on occurs typically in a few hundred nanoseconds. Between time Tl and T2 the current in the inductor 207 starts to rise discharging the parasitic capacitance associated with the first, or main, switching device 201.

The rate of change of current in the inductor 207 is controlled by the first resonant network formed by the inductor and the parasitic capacitance of the main switching device 201. At the end of T2 the inductor current has risen to its final value (determined by the characteristic impedance of the first resonant network in conjunction with the load resistor 205) and the collector voltage of the main switching device 201 has reached zero. The collector voltage is prevented from ringing below zero by the internal anti-parallel diode 20 Id of the main switching device 201.

A short time after the collector voltage of the first, or main, switching device 201 has reached zero (T3) the main switching device 201 is turned on. Since this happens under essentially zero voltage and current conditions there is little associated switching loss. Once the main switching device 201 has been turned on, the auxiliary switching device 202 is turned off (T4). At this instant the current flowing in the inductor commutates via diode

203 to charge capacitor 206.

Figure 5 shows the current flow at the start of T4 of the timing diagram of Figure 3. Figure 6 shows the current flow at the end of T4 of the timing diagram of Figure 3.

Between times T4 and T5 the collector voltage of auxiliary switching device 202 rises until it is clamped to the supply voltage 200-DC by diode 204 and the inductor current decays to zero. The net result of this is that energy stored in inductor 207 during turn-on is effectively transferred to capacitor 206 with any excess being recycled back to the DC supply 200-DC.

Figure 7 shows the current flow from T6 to T7 of the timing diagram of Figure 3.

At instant T6 the main switching device 201 is turned off. Since the capacitor 206 was previously charged during the turnoff of the auxiliary switching device 202, current commutates from the IGBT into the capacitor 206 and is returned to the DC supply 200- DC via diode 204. Between T6 and T7 the collector voltage of the main switching device

201 rises transferring the energy stored in the capacitor 206 back to the DC supply 200-DC.

The cycle is repeated as necessary to control the current flowing in the load resistor 205 to create a duty cycle as mentioned earlier.

FURTHER EMBODIMENTS

Figure 8 is a schematic diagram showing a second embodiment of the dissipation circuit 200, in this example a braking load. Figure 8 shows a modified version of the circuit 200 of Figure 2 and like reference signs have been used for like components. Only the differences are described.

The dissipation circuit 200 of Figure 8 incorporates an additional diode 208 to clamp the voltage developed across the first, or main, switching device 201. This is particularly suited to systems with a high DC rail voltage where additional voltage stress cannot be tolerated.

Figure 9 is a schematic diagram showing a third embodiment of the dissipation circuit 200. Figure 9 shows a modified version of the circuit 200 of Figure 2 and like reference signs have been used for like components. Only the differences are described.

The quasi-resonant braking load, or dissipation circuit 200, shown in Figure 9 includes an additional capacitor 209 in parallel with the first, or main, switching device 201 to reduce the rate of rise of voltage across the load, or braking resistor 205.

Also, the additional capacitor 209 ensures a full resonant turn-off of the main switching device 201 over a wide range of DC bus voltages. Without this, there may be insufficient energy stored in the collector-emitter capacitance of the main switching device 201 to fully charge the capacitor 206 when the auxiliary switch 202 turns off.

Also, the second, or auxiliary switching device 202 has been implemented using a MOSFET rather than an IGBT. The choice of MOSFET rather than IGBT for the auxiliary switch

202 comes down to a trade-off between switching speed and switching loss. Since the auxiliary switch 202 turn-on occurs with the full DC bus voltage across the auxiliary switch 202, the auxiliary switch 202 exhibits switching loss proportional to (½) x Cds x V 2 x f where Cds is the drain-source capacitance and f is the switching frequency. The particular device was carefully selected for minimal capacitance.

The invention finds particular with motors and generators, and in particular with micro combined heat and power (MCHP) units.

It should be noted that other additional embodiments of the braking load circuit could include implementation with any semiconductor switching device (or combination thereof) including but not limited to:

• IGBTs

• MOSFETs

• Bipolar transistors

• Silicon controlled rectifiers

The combination of a MOSFET auxiliary switch and one or more IGBT main switches is thought to be a particularly valuable embodiment since it utilises the best characteristics of each device.

Additional circuit arrangements could include:

• The addition of inductance in series with the load resistor 205 to reduce EMC emissions;

• The addition of a common mode choke in series with the load resistor 205 (again to reduce EMC emissions);

• The addition of capacitance across the main switch 201 (as implemented in the third embodiment); and

• The use of an external diode across the main switch 201 (rather than relying on an internal anti-parallel diode). In the embodiments described, control signals to the gate of each switching device may be provided by a Texas Instruments (RTM) TMS320 DSP via appropriate gate drivers as would be known to the skilled person.

This invention describes a technique for transferring energy from an electric motor to a braking resistor in a manner that reduces the amount of electromagnetic noise produced. In addition this invention reduces the amount of unwanted switching loss associated with the switching devices used to control the energy transfer.

In one practical embodiment, the braking resistor is externally connected.

Although a few preferred embodiments have been shown and described, it will be appreciated by those skilled in the art that various changes and modifications might be made without departing from the scope of the invention, as defined in the appended claims.