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Title:
RECEPTION OF VARIABLE AND RUN-LENGTH ENCODED DATA
Document Type and Number:
WIPO Patent Application WO1999035749
Kind Code:
A3
Abstract:
In a receiver, a variable-length decoder (VLD) derives run-value pairs (RVP) from variable and run-length encoded data (ED) such as, for example, MPEG-encoded data. A run-value pair (RVP) comprises a coefficient value (CV) and a run length (RL). The run length (RL) indicates a number (N) of zero coefficients (0) which precede the coefficient value (CV), N being an integer. A processing circuit (PRC) processes the run-value pairs (RVP) to obtain a decoded data stream (DD). The processing circuit (PRC) comprises a clock circuit (CLC) and a control circuit (CON). The clock circuit (CLC) generates clock cycles (CC) which are synchronous with the decoded data stream (DD). With each run-value pair (RVP) having a run length (RL) unequal to zero, the control circuit (CON) stalls the variable-length decoder (VLD) a number (N) of clock cycles (CC). The number (N) of clock cycles is proportional to the number (N) of zero coefficients indicated by the run length (RL). In such a receiver, the processing circuit (PRC) requires relatively little buffer memory, thus allowing cost-efficient implementations.

Inventors:
PEIN HOWARD
DEAN JOHN
BAKHMUTSKY MICHAEL
SHEN RICHARD
Application Number:
PCT/IB1998/002040
Publication Date:
September 16, 1999
Filing Date:
December 14, 1998
Export Citation:
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Assignee:
KONINKL PHILIPS ELECTRONICS NV (NL)
PHILIPS SVENSKA AB (SE)
International Classes:
H03M7/42; G06T9/00; H03M7/46; (IPC1-7): H03M7/44; H03M7/46
Foreign References:
US5264847A1993-11-23
US5706001A1998-01-06
US5055841A1991-10-08
US5233348A1993-08-03
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