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Patent Searching and Data


Title:
REDUCING COMPILER TYPE CHECK COSTS THROUGH THREAD SPECULATION AND HARDWARE TRANSACTIONAL MEMORY
Document Type and Number:
WIPO Patent Application WO/2021/068102
Kind Code:
A1
Abstract:
Systems, apparatuses and methods may provide for technology that generates a first compiler output based on input code that includes dynamically typed variable information and generates a second compiler output based on the input code, wherein the second compiler output includes type check code to verify one or more type inferences associated with the first compiler output. The technology may also execute the first compiler output and the second compiler output in parallel via different threads.

Inventors:
ZHANG SHIYU (CN)
DING JUNYONG (CN)
LI TIANYOU (CN)
HAGHIGHAT MOHAMMAD (US)
Application Number:
PCT/CN2019/109904
Publication Date:
April 15, 2021
Filing Date:
October 08, 2019
Export Citation:
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Assignee:
INTEL CORP (US)
ZHANG SHIYU (CN)
DING JUNYONG (CN)
LI TIANYOU (CN)
HAGHIGHAT MOHAMMAD R (US)
International Classes:
G06F8/41
Foreign References:
CN108920149A2018-11-30
CN101441569A2009-05-27
CN105493041A2016-04-13
CN104081361A2014-10-01
US8387027B22013-02-26
US10061568B22018-08-28
US20150220338A12015-08-06
Other References:
MARTIN SUESSKRAUT ET AL.: "Speculation for Parallelizing Runtime Checks", STABILIZATION, SAFETY, AND SECURITY OF DISTRIBUTED SYSTEMS, 3 November 2009 (2009-11-03)
See also references of EP 4042273A4
Attorney, Agent or Firm:
CHINA PATENT AGENT (H.K.) LTD. (CN)
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