Title:
REVERSE CURRENT SUPPRESSION CIRCUIT FOR PMOS TRANSISTOR
Document Type and Number:
WIPO Patent Application WO/2023/015690
Kind Code:
A1
Abstract:
A reverse current suppression circuit for a PMOS transistor, comprising: a gate driving unit (101), wherein if the potential of a source of a first PMOS transistor is less than the potential of a drain, the gate driving unit (101) makes the potential of a gate of the first PMOS transistor be equal to potential of the drain, so that the first PMOS transistor is in a reverse current suppression state; and a substrate switching unit (102), wherein if the potential of the source of the first PMOS transistor is less than the potential of the drain, the substrate switching unit (102) shorts a substrate of the first PMOS transistor to the drain of the first PMOS transistor. If the potential of a source of a PMOS transistor is less than potential of a drain, the PMOS transistor can be controlled to operate in a reverse current suppression state to effectively protect the PMOS transistor.
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Inventors:
SHEN HUA (CN)
Application Number:
PCT/CN2021/120975
Publication Date:
February 16, 2023
Filing Date:
September 27, 2021
Export Citation:
Assignee:
WUXI CRYSTAL SOURCE MICROELECTRONICS CO LTD (CN)
International Classes:
H02H7/20; H02H3/20; H02H11/00
Foreign References:
CN103001617A | 2013-03-27 | |||
CN102684167A | 2012-09-19 | |||
CN109088532A | 2018-12-25 | |||
CN110149042A | 2019-08-20 | |||
JP2000022517A | 2000-01-21 |
Attorney, Agent or Firm:
BEIJING TIANDUN INTELLECTUAL PROPERTY AGENT LTD. (CN)
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