Title:
SCANNING-LINE DRIVING CIRCUIT AND DISPLAY DEVICE PROVIDED WITH SAME
Document Type and Number:
WIPO Patent Application WO/2021/176504
Kind Code:
A1
Abstract:
This scanning-line driving circuit is configured such that a plurality of unit circuits are connected in multiple stages. The scanning-line driving circuit is integrated with a display panel. The unit circuit includes a first transistor with one conducting electrode receiving a first-level voltage and the other conducting electrode connected to a first node, a resistor with one end connected to the first node, a second transistor with one conducting electrode receiving a second-level voltage and the other conducting electrode connected to the other end of the resistor, and an output transistor with a control electrode connected to the first node and one conducting electrode connected to an output terminal. The resistor is formed on a semiconductor layer, and an upper electrode is formed on the resistor. Thus, the provided scanning-line driving circuit can prevent a malfunction caused by the property fluctuations of the resistor in the unit circuit.
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Inventors:
MITANI MASAHIRO
YOKOYAMA MAKOTO
UEDA NAOKI
YOKOYAMA MAKOTO
UEDA NAOKI
Application Number:
PCT/JP2020/008640
Publication Date:
September 10, 2021
Filing Date:
March 02, 2020
Export Citation:
Assignee:
SHARP KK (JP)
International Classes:
G09G3/20; G09F9/00; G09F9/30; G09G3/3266
Domestic Patent References:
| WO2015012207A1 | 2015-01-29 | |||
| WO2012029799A1 | 2012-03-08 |
Foreign References:
| JP2010277652A | 2010-12-09 | |||
| JP2014056256A | 2014-03-27 | |||
| JP2006311579A | 2006-11-09 |
Attorney, Agent or Firm:
SHIMADA, Akihiro et al. (JP)
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