Title:
SELECTIVELY DEFERRING THE EXECUTION OF INSTRUCTIONS WITH UNRESOLVED DATA DEPENDENCIES
Document Type and Number:
WIPO Patent Application WO2005038646
Kind Code:
A3
Abstract:
One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint that can subsequently be used to return execution of the program to the point of the instruction. Next, the system executes subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of an unresolved data dependency are deferred, and wherein other non-deferred instructions are executed in program order.
Inventors:
CHAUDHRY SHAILENDER (US)
TREMBLAY MARC (US)
TREMBLAY MARC (US)
Application Number:
PCT/US2004/031002
Publication Date:
October 26, 2006
Filing Date:
September 09, 2004
Export Citation:
Assignee:
SUN MICROSYSTEMS INC (US)
CHAUDHRY SHAILENDER (US)
TREMBLAY MARC (US)
CHAUDHRY SHAILENDER (US)
TREMBLAY MARC (US)
International Classes:
G06F9/38; G06F9/00; G06F9/45
Foreign References:
| US5251306A | 1993-10-05 | |||
| US5751985A | 1998-05-12 | |||
| US20010029590A1 | 2001-10-11 |
Other References:
CAN R ET AL: "A LOW-COMPLEXITY ISSUE LOGIC", INTERNATIONAL CONFERENCE ON SUPERCOMPUTING, CONFERENCE PROCEEDINGS, ACM, NEW YORK, US, 8 May 2000 (2000-05-08), pages 327 - 335, XP001151623
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