Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2013/042491
Kind Code:
A1
Abstract:
A semiconductor device manufacturing method comprises: a step of preparing a structure whereupon a copper film is formed such that a trench part is filled therewith via a barrier film upon an inter-layer insulation film having a trench upon a substrate; a step of removing the copper film of the structure to the barrier film interface with chemical mechanical polishing and forming copper wiring within the trench part; a step of etching the copper wiring and moving back the surface thereof further than the inter-layer insulation film surface; and a step of removing the barrier film by the chemical mechanical polishing. When moving back the surface of the copper wiring further than the inter-layer insulation film surface, the structure is positioned in a vacuum state organic compound atmosphere, an oxygen gas cluster ion beam is projected on a face including the copper wiring surface of the structure. With the oxygen gas cluster ions therein, the copper on the surface of the copper wiring is oxidized, forming copper oxide, and the copper oxide reacts with the organic compound, anisotropically etching the copper wiring.
Inventors:
HARA KENICHI (JP)
HAYAKAWA TAKASHI (JP)
OZAWA MARIKO (JP)
HAYAKAWA TAKASHI (JP)
OZAWA MARIKO (JP)
Application Number:
PCT/JP2012/070661
Publication Date:
March 28, 2013
Filing Date:
August 14, 2012
Export Citation:
Assignee:
TOKYO ELECTRON LTD (JP)
HARA KENICHI (JP)
HAYAKAWA TAKASHI (JP)
OZAWA MARIKO (JP)
HARA KENICHI (JP)
HAYAKAWA TAKASHI (JP)
OZAWA MARIKO (JP)
International Classes:
H01L21/768; H01L21/3205; H01L23/532
Foreign References:
JP2004200684A | 2004-07-15 | |||
JP2009043975A | 2009-02-26 | |||
JP2010027788A | 2010-02-04 | |||
JP2006120664A | 2006-05-11 |
Attorney, Agent or Firm:
TAKAYAMA HIROSHI (JP)
Hiroshi Takayama (JP)
Hiroshi Takayama (JP)
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Claims:
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