Title:
SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/003047
Kind Code:
A1
Abstract:
Provided is a semiconductor device enabling high integration. Specifically provided is a semiconductor device which has a transistor, an interlayer film, and a first conductor, and in which: the transistor is provided with an oxide upon a first insulator, a second conductor upon the oxide, a second insulator provided between the oxide and the second conductor and provided in a manner touching the side surfaces of the second conductor, and a third insulator provided to the side surfaces of the second conductor, with the second insulator sandwiched therebetween; the oxide has a first region, a second region, and a third region; the first region overlaps with the second conductor; the second region is provided between the first region and the third region; the third region has a lower resistance than the second region; the second region has a lower resistance than the first region; the interlayer film is provided upon the first insulator and upon the oxide; the first conductor is electrically connected to the third region; the third region overlaps with any one among the third insulator, the first conductor, and the interlayer film; and the top surface of the third insulator is aligned with the top surface of the interlayer film.
Inventors:
YAMAZAKI SHUNPEI (JP)
MATSUBAYASHI DAISUKE (JP)
ONUKI TATSUYA (JP)
MATSUBAYASHI DAISUKE (JP)
ONUKI TATSUYA (JP)
Application Number:
PCT/IB2018/054487
Publication Date:
January 03, 2019
Filing Date:
June 19, 2018
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L29/786; G11C11/405; H01L21/336; H01L21/8234; H01L21/8242; H01L27/06; H01L27/088; H01L27/108; H01L27/1156; H01L29/788; H01L29/792; H03K19/177
Domestic Patent References:
| WO2016189425A1 | 2016-12-01 |
Foreign References:
| JP2017050530A | 2017-03-09 | |||
| JP2017045989A | 2017-03-02 | |||
| JP2016167591A | 2016-09-15 |
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