Title:
SEMICONDUCTOR DEVICE AND METHOD FOR SEMICONDUCTOR DEVICE FABRICATION
Document Type and Number:
WIPO Patent Application WO/2023/203425
Kind Code:
A1
Abstract:
The present invention provides a semiconductor device having a transistor of a very small size. In the semiconductor device, a second conductive layer is provided above the first conductive layer, the second conductive layer has a first opening that overlaps with the first conductive layer, a third conductive layer is provided above the second conductive layer, the third conductive layer has a second opening that overlaps with the first opening, a first insulating layer is in contact with the sidewall of the first opening of the second conductive layer, a semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface of the third conductive layer, a second insulating layer is provided above the semiconductor layer, a fourth conductive layer is provided above the second insulating layer, the first insulating layer has a region sandwiched between the sidewall of the first opening of the second conductive layer and the semiconductor layer, and the semiconductor layer has a region sandwiched between the sidewall of the first opening of the second conductive layer and the fourth conductive layer.
Inventors:
JINTYOU MASAMI
SHIMA YUKINORI
KOEZUKA JUNICHI (JP)
IGUCHI TAKAHIRO
SHIMA YUKINORI
KOEZUKA JUNICHI (JP)
IGUCHI TAKAHIRO
Application Number:
PCT/IB2023/053563
Publication Date:
October 26, 2023
Filing Date:
April 07, 2023
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L29/786; G09F9/00; G09F9/30; H05B33/10; H05B33/14; H10K50/10
Domestic Patent References:
| WO2004105140A1 | 2004-12-02 |
Foreign References:
| JP2012174836A | 2012-09-10 | |||
| JP2017168761A | 2017-09-21 | |||
| JP2016149552A | 2016-08-18 | |||
| JP2018157205A | 2018-10-04 |
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