Title:
SEMICONDUCTOR DEVICE AND MULTIPLY-ACCUMULATE OPERATION DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/188457
Kind Code:
A1
Abstract:
[Problem] To provide a semiconductor device and multiply-accumulate operation device with which higher-density integration can be achieved by further reducing the installation area for each synapse. [Solution] Provided is a semiconductor device comprising: a plurality of synapses wherein non-volatile variable resistance elements which take a first resistance value and a second resistance value which is lower than the first resistance value, and fixed resistance elements which have a higher resistance than the second resistance value, are connected in series; and an output line for outputting the sum total of the currents flowing through the plurality of synapses.
Inventors:
KOBAYASHI TOSHIYUKI (JP)
MORIMOTO RUI (JP)
OKUNO JUN (JP)
TSUKAMOTO MASANORI (JP)
SHUTO YUSUKE (JP)
MORIMOTO RUI (JP)
OKUNO JUN (JP)
TSUKAMOTO MASANORI (JP)
SHUTO YUSUKE (JP)
Application Number:
PCT/JP2019/011016
Publication Date:
October 03, 2019
Filing Date:
March 15, 2019
Export Citation:
Assignee:
SONY CORP (JP)
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
G06G7/60; G06N3/063; H01L45/00; H01L49/00
Foreign References:
JP2015195011A | 2015-11-05 | |||
JP2009282782A | 2009-12-03 | |||
US20160379110A1 | 2016-12-29 |
Attorney, Agent or Firm:
SAKAI INTERNATIONAL PATENT OFFICE (JP)
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