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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/145109
Kind Code:
A1
Abstract:
The purpose of the present invention is to provide a feature that makes it possible to precisely reduce parasitic capacitance in a semiconductor device. This semiconductor device comprises: a base region; a source region; a second trench that passes through the base region and reaches a drift layer; a second protective layer that is arranged on the bottom of the second trench; a source electrode of which at least a portion is arranged in the second trench, the source electrode being electrically connected to a first protective layer, the base region, and the source region; and a second-electroconductivity-type source-side connection layer that forms at least a portion of the side of the second trench, the second-electroconductivity-type source-side connection layer being connected to the base region and the second protective layer.

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Inventors:
SUGAWARA KATSUTOSHI (JP)
FUKUI YUTAKA (JP)
TANAKA RINA (JP)
HATTA HIDEYUKI (JP)
Application Number:
PCT/JP2019/050295
Publication Date:
July 16, 2020
Filing Date:
December 23, 2019
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H01L21/28; H01L21/822; H01L21/8234; H01L27/04; H01L27/088; H01L29/12; H01L29/41; H01L29/423; H01L29/49; H01L29/78
Domestic Patent References:
WO2017175460A12017-10-12
Foreign References:
JP2017220667A2017-12-14
JP2015195307A2015-11-05
Attorney, Agent or Firm:
YOSHITAKE Hidetoshi et al. (JP)
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