Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2015/145913
Kind Code:
A1
Abstract:
The present invention relates to a semiconductor device. This semiconductor device has an n-type semiconductor region (12), an n-type source region (14), an n-type drain region (16), and a plurality of p-type embedded gate regions (18). Furthermore, the semiconductor device has a super junction structure (38). The super junction structure (38) is configured from: a plurality of p-type first regions (36p), each of which extends from each of the embedded gate regions (18) toward the drain region (16); and n-type second regions (36n) that are present among the first regions (36p). Furthermore, each of the embedded gate regions (18) has a configuration wherein each of the embedded gate regions is connected to an upper portion of each of the first regions (36p).
Inventors:
SHIMIZU NAOHIRO (JP)
YANO KOJI (JP)
YANO KOJI (JP)
Application Number:
PCT/JP2014/084600
Publication Date:
October 01, 2015
Filing Date:
December 26, 2014
Export Citation:
Assignee:
NGK INSULATORS LTD (JP)
UNIV YAMANASHI (JP)
UNIV YAMANASHI (JP)
International Classes:
H01L21/337; H01L21/338; H01L29/808; H01L29/812
Domestic Patent References:
WO2011108768A1 | 2011-09-09 |
Foreign References:
JP2010045218A | 2010-02-25 | |||
JP2005005385A | 2005-01-06 | |||
JP2001196605A | 2001-07-19 | |||
JP2012004173A | 2012-01-05 | |||
JP3284120B2 | 2002-05-20 | |||
JP2010045218A | 2010-02-25 | |||
JP4832723B2 | 2011-12-07 |
Other References:
See also references of EP 2963678A4
Attorney, Agent or Firm:
CHIBA Yoshihiro et al. (JP)
Takehiro Chiba (JP)
Takehiro Chiba (JP)
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