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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/048083
Kind Code:
A1
Abstract:
The present invention increases the degree of integration of a semiconductor device. This semiconductor device comprises: a three-dimensional material layer; a first transistor including the three-dimensional material layer; a two-dimensional material layer; and a second transistor including the two-dimensional material layer. In addition, the first and second transistors are provided on the same substrate.

Inventors:
MATSUMOTO KOICHI (JP)
Application Number:
PCT/JP2023/025489
Publication Date:
March 07, 2024
Filing Date:
July 10, 2023
Export Citation:
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Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/088; H01L21/3205; H01L21/336; H01L21/768; H01L21/8234; H01L23/522; H01L27/06; H01L29/78; H01L29/786
Domestic Patent References:
WO2020136467A12020-07-02
Foreign References:
CN105990427A2016-10-05
US20180175213A12018-06-21
US20180012962A12018-01-11
JP2011190156A2011-09-29
Attorney, Agent or Firm:
TANAKA Hidetetsu et al. (JP)
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