Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/071040
Kind Code:
A1
Abstract:
A semiconductor integrated circuit device (1) includes a plurality of standard cell rows (10) having a plurality of standard cells (11) arranged in the X direction and a plurality of power supply wirings (L1) extending in the X direction and supplying power to the plurality of standard cells (11), a plurality of strap power supply wirings (30) extending in the Y direction, a plurality of sub-strap power supply wirings (40) extending in the Y direction and each connected to each of the plurality of power supply wirings (L1), and a plurality of switch cells (SW) provided at intersections of the plurality of strap power supply wirings (30) and the plurality of power supply wirings (L1). The plurality of standard cell rows (10) have standard cell rows (10b) in which the switch cells (SW) are not arranged at positions corresponding to one or more standard cell columns other than the standard cell columns (21) and (22) at both ends of the plurality of standard cell columns (20).
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Inventors:
NAKANO MISAO
NAKAMURA TAKEO
NAKAMURA TAKEO
Application Number:
PCT/JP2023/034737
Publication Date:
April 04, 2024
Filing Date:
September 25, 2023
Export Citation:
Assignee:
NUVOTON TECH CORPORATION JAPAN (JP)
International Classes:
H01L21/82; H01L21/822; H01L27/04
Attorney, Agent or Firm:
NII, Hiromori et al. (JP)
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