Title:
SEMICONDUCTOR MEMORY
Document Type and Number:
WIPO Patent Application WO/2004/077443
Kind Code:
A1
Abstract:
A semiconductor memory characterized by comprising a plurality of bit lines connected, respectively, with a plurality of selected memory cells, a plurality of sense amplifiers connected with one of the plurality of bit lines, a timing circuit generating a signal for activating the plurality of sense amplifiers, respectively, at a different timing, and an output circuit for selecting and delivering up-to-date data, out of data being supplied from the plurality of sense amplifiers at a different timing, in the order of being supplied.
Inventors:
UETAKE TOSHIYUKI (JP)
Application Number:
PCT/JP2003/002269
Publication Date:
September 10, 2004
Filing Date:
February 27, 2003
Export Citation:
Assignee:
FUJITSU LTD (JP)
UETAKE TOSHIYUKI (JP)
UETAKE TOSHIYUKI (JP)
International Classes:
G11C7/06; G11C7/10; G11C11/4091; G11C11/4096; (IPC1-7): G11C11/34
Foreign References:
| JPH08227581A | 1996-09-03 | |||
| JP2002230980A | 2002-08-16 | |||
| JPH08273369A | 1996-10-18 | |||
| JPH0354795A | 1991-03-08 | |||
| JPH02276094A | 1990-11-09 | |||
| JPH04115397U | 1992-10-13 | |||
| JPH10334670A | 1998-12-18 | |||
| JP2000235795A | 2000-08-29 |
Attorney, Agent or Firm:
Itoh, Tadahiko (Yebisu Garden Place Tower 20-3, Ebisu 4-chom, Shibuya-ku Tokyo, JP)
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