Title:
SEMICONDUCTOR MODULE, PROCESS FOR PRODUCTION THEREOF
Document Type and Number:
WIPO Patent Application WO/2011/040313
Kind Code:
A1
Abstract:
A semiconductor chip (40) is bound to one main surface of an insulating substrate (60). A metal base plate (50) is bound to the other main surface of the insulating substrate (60). Subsequently, a resin case is fixed to the peripheral part of the metal base plate (50) in a member containing the semiconductor chip (40). Subsequently, a surface electrode formed on the semiconductor chip (40) is connected to an external connection terminal of the resin case through a bonding wire (81), thereby sealing the semiconductor chip (40). In this manner, a semiconductor device (10) is assembled. In the assembled semiconductor device (10), a solder (31) (32) and a reactive metal foil (30) that acts as a heat source are inserted between the metal base plate (50) and a heat sink (20), the resulting product is pressurized, an electric current is applied to the reactive metal foil (30) to cause ignition to occur, thereby melting the solder (31) (32), and the molten solder (31) (32) is solidified. In this manner, the metal base plate (50) and the heat sink (20) are bound to each other instantly at room temperature.
Inventors:
MOROZUMI AKIRA (JP)
IKEDA YOSHINARI (JP)
IKEDA YOSHINARI (JP)
Application Number:
PCT/JP2010/066454
Publication Date:
April 07, 2011
Filing Date:
September 22, 2010
Export Citation:
Assignee:
FUJI ELECTRIC SYSTEMS CO LTD (JP)
MOROZUMI AKIRA (JP)
IKEDA YOSHINARI (JP)
MOROZUMI AKIRA (JP)
IKEDA YOSHINARI (JP)
International Classes:
H01L23/373; B23K1/00; B23K3/04; H01L23/36; H05K7/20
Foreign References:
| JP2009088330A | 2009-04-23 | |||
| JP2006093700A | 2006-04-06 | |||
| JP2007501715A | 2007-02-01 |
Attorney, Agent or Firm:
SAKAI, AKINORI (JP)
Akinori Sakai (JP)
Akinori Sakai (JP)
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