Title:
SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/171452
Kind Code:
A1
Abstract:
According to the present invention, a two-port SRAM comprises load transistors (PU1, PU2), drive transistors (PD1, PD2), access transistors (PG1, PG2), a read drive transistor (RPD), and a read access transistor (RPG). Embedded wires (11, 12) respectively corresponding to write bit lines (WBLB, WBL) are formed in an embedded wiring layer so as to extend in a first direction. Wires (91, 92) respectively corresponding to a read word line (RWL) and a write word line (WWL) are formed in a wiring layer above the embedded wiring layer so as to extend in a second direction.
Inventors:
HIROSE MASANOBU (JP)
Application Number:
PCT/JP2023/007124
Publication Date:
September 14, 2023
Filing Date:
February 27, 2023
Export Citation:
Assignee:
SOCIONEXT INC (JP)
International Classes:
G11C11/412; H10B10/00; H01L21/82; H01L21/8238; H01L27/092
Domestic Patent References:
| WO2020255801A1 | 2020-12-24 | |||
| WO2019155559A1 | 2019-08-15 | |||
| WO2021125094A1 | 2021-06-24 |
Foreign References:
| JP2019525484A | 2019-09-05 |
Attorney, Agent or Firm:
MAEDA & PARTNERS (JP)
Download PDF:
Previous Patent: HEADER AND HEAT EXCHANGER
Next Patent: VEHICLE TUBE MEMBER AND METHOD FOR MANUFACTURING VEHICLE TUBE MEMBER
Next Patent: VEHICLE TUBE MEMBER AND METHOD FOR MANUFACTURING VEHICLE TUBE MEMBER