SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR

Title:

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR

Document Type and Number:

WIPO Patent Application WO/2021/203885

Kind Code:

A1

Abstract:

A semiconductor structure and a manufacturing method therefor. The manufacturing method for a semiconductor structure comprises: providing a substrate (11) and bit line structures (12), a metal layer (123) being provided in the bit line structures (12), and the top surface of the metal layer (123) being lower than the top surface of the bit line structures (12); forming a first isolation film (132) filled between adjacent bit line structures (12), the top surface of the first isolation film (132) being higher than the top surface of the metal layer (123) and lower than the top surface of the bit line structures (12); forming a first dielectric film (141) on the top and side walls of the bit line structures (12) and the top surface of the first isolation film (132); performing etching by using a mask-less dry etching process to remove the first dielectric film (141) located on the top of the bit line structures (12) and the top surface of the first isolation film (132), so as to form a first dielectric layer (142), and performing etching to remove the first isolation film (132) exposed by the first dielectric layer (142), so as to form a first isolation layer (133) located directly below the first dielectric layer (142).

Inventors:

ZHU XIAO (CN)

Application Number:

PCT/CN2021/079488

Publication Date:

October 14, 2021

Filing Date:

March 08, 2021

Export Citation:

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Assignee:

CHANGXIN MEMORY TECH INC (CN)

International Classes:

H01L21/8242; H01L27/108

Foreign References:

CN103903994A	2014-07-02
CN210272309U	2020-04-07
US20100285662A1	2010-11-11
CN110970351A	2020-04-07
CN110970436A	2020-04-07
CN110931485A	2020-03-27

Other References: