SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR

WIPO Patent Application WO/2023/092827

A1

The present application relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method therefor, for use in solving the technical problem of short circuit due to the fact that conductive contacts are easy to contact each other. The manufacturing method for the semiconductor structure comprises: providing a substrate, multiple active regions arranged at intervals being provided in the substrate, and an insulation layer and a barrier layer that are stacked in sequence covering the substrate; forming, in the barrier layer, multiple first trenches arranged at intervals, extending in a first direction, and penetrating through the barrier layer; forming a filling layer in the first trenches, and forming a first mask layer on the barrier layer and the filling layer; forming, in the first mask layer, multiple second trenches arranged at intervals, extending in a second direction, and exposing the filling layer; and removing the filling layer exposed in the second trenches and the insulation layer corresponding to the filling layer to form contact holes. By using the first trenches and the second trenches to form the contact holes, the communication among the contact holes is reduced, thereby reducing the possibility of short circuit due to the contact between conductive contacts.

YU YEXIAO (CN)
LIU ZHONGMING (CN)
KONG ZHONG (CN)
CHEN LONGYANG (CN)

PCT/CN2022/070399

June 01, 2023

January 05, 2022

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CHANGXIN MEMORY TECH INC (CN)

H01L21/8242

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LEADER PATENT & TRADEMARK FIRM (CN)

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