Title:
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/066247
Kind Code:
A1
Abstract:
Disclosed are a semiconductor structure and a manufacturing method therefor. The semiconductor structure comprises: a substrate (100) comprising an array region (110) and a peripheral region (120) adjacent to each other; a bit line (101) extending in a first direction (X), semiconductor channels (102) extending in a second direction (Y), and word lines (103) extending in a third direction (Z), which are located in the array region (110); a stepped structure (104) located in the peripheral region (120) and comprising a plurality of steps (114) in one-to-one contact connection with one of the bit line (101) and the word lines (103); a plurality of conductive columns (105) in one-to-one contact connection with the top surfaces of the steps (114) and having the same extension direction as that of the other of the bit line (101) and the word lines (103); and a support framework (106) located between any two adjacent conductive columns (105) and in contact connection with each step (114).
Inventors:
HUANG MENG (CN)
Application Number:
PCT/CN2023/083452
Publication Date:
April 04, 2024
Filing Date:
March 23, 2023
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/82
Foreign References:
| CN113540152A | 2021-10-22 | |||
| CN113228275A | 2021-08-06 | |||
| US20190319040A1 | 2019-10-17 |
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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