Title:
SEMICONDUCTOR STRUCTURE AND MEMORY
Document Type and Number:
WIPO Patent Application WO/2024/040622
Kind Code:
A1
Abstract:
The embodiments of the present disclosure disclose a semiconductor structure. The semiconductor structure comprises: a substrate, and an isolation structure located in the substrate, wherein the isolation structure defines an active region in the substrate, and the active region comprises a source region, a drain region and a channel region; and a gate, which covers the channel region, and comprises a main body portion extending in a first direction, wherein the source region and the drain region are located on two sides of the main body portion in a second direction, the second direction being perpendicular to the first direction. The channel region comprises a first channel region right below the main body portion, and the first channel region has a recess at an interface between the first channel region and the isolation structure.
Inventors:
CHO GYUSEOG (CN)
Application Number:
PCT/CN2022/115543
Publication Date:
February 29, 2024
Filing Date:
August 29, 2022
Export Citation:
Assignee:
CXMT CORP (CN)
International Classes:
H01L29/78; H01L29/10
Foreign References:
| US20070029619A1 | 2007-02-08 | |||
| KR100608374B1 | 2006-08-08 | |||
| CN114175218A | 2022-03-11 | |||
| CN103855222A | 2014-06-11 |
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
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